
Citation 
 Permanent Link:
 http://digital.auraria.edu/AA00001813/00001
Material Information
 Title:
 The application of deltasigma conversion to telemetry reception
 Creator:
 Holsteen, David Walter
 Place of Publication:
 Denver, Colo.
 Publisher:
 University of Colorado Denver
 Publication Date:
 1993
 Language:
 English
 Physical Description:
 viii, 82 leaves : illustrations ; 29 cm
Thesis/Dissertation Information
 Degree:
 Doctorate ( Master of Science)
 Degree Grantor:
 University of Colorado Denver
 Degree Divisions:
 Department Electrical Engineering, CU Denver
 Degree Disciplines:
 Electrical Engineering
 Committee Chair:
 Bose, Tamal
 Committee Members:
 Bush, Edward
Goggin, Shelly Radenkovic, Miloje
Subjects
 Subjects / Keywords:
 Analogtodigital converters ( lcsh )
Analogtodigital converters ( fast )
 Genre:
 bibliography ( marcgt )
theses ( marcgt ) nonfiction ( marcgt )
Notes
 Bibliography:
 Includes bibliographical references (leaves 8182).
 General Note:
 Submitted in partial fulfillment of the requirements for the degree, Master of Science, Electrical Engineering.
 Statement of Responsibility:
 by David Walter Holsteen.
Record Information
 Source Institution:
 University of Colorado Denver
 Holding Location:
 Auraria Library
 Rights Management:
 All applicable rights reserved by the source institution and holding location.
 Resource Identifier:
 30834704 ( OCLC )
ocm30834704
 Classification:
 LD1190.E54 1993m .H65 ( lcc )

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Full Text 
THE APPLICATION OF DELTASIGMA CONVERSION
TO TELEMETRY RECEPTION
by
David Walter Holsteen
B.S., Louisiana State University, 1982
A thesis submitted to the
Faculty of the Graduate School of the
University of Colorado at Denver
in partial fulfillment
of the requirements for the degree of
Master of Science
Electrical Engineering
1993
This thesis for the Master of Science
degree by
David Walter Holsteen
has been approved for the
Department of
Electrical Engineering
by
Date
Holsteen, David Walter (M.S., Electrical Engineering)
The Application of DeltaSigma Conversion to Telemetry
Reception
Thesis directed by Assistant Professor Tamal Bose
ABSTRACT
Current technology has advanced to the point where the
frequency of operation and density of microelectronics can
support a digital implementation of a telemetry receiver.
Such a receiver would provide increased flexibility in
processing various types of telemetry. The problem to date
has been the difficulty in implementing all the necessary
functions in the digital domain with the capability of
operating at 200 MHz and above. These functions include
analog to digital conversion, the digital filtering, and
the tuning.
The deltasigma converter brings new possibilities to
this application. Therefore, this research presents an
analysis of the use of deltasigma conversion as the analog
to digital conversion function in a telemetry receiver. A
few deltasigma converters including those with single
iii
order, multiple order, and bandpass structures are
investigated.
Because of the unique characteristics of the bandpass
AS structure, a system using it is able to get by with an
oversampling ratio of 1.5 and the tuner can be replaced
with an enable gate. These modifications together with a
Combined integrator Comb (CIC) decimating filter yields an
architecture that is physically realizable.
The signal to quantization noise ratio (QSNR) is
derived for this architecture. The result indicates that
this architecture has a QSNR limitation due to the tuning
function. The architecture is simulated on a computer and
the results agree well with the theory.
This abstract accurately represents.the content of the
candidate's thesis. I recommend its publication.
Signed
Tamal Bose
IV
CONTENTS
Chapter
1. Introduction...................................... 1
1.1. Oversampled Conversion........................... 2
1.2. DeltaSigma Conversion............................ 4
2. AS Converter Structure............................ 8
2.1. Single Loop Structure............................ 9
2.2. Higher Order Loop Structures..................... 12
2.3. Bandpass Structures.............................. 13
2.4. Decoding Filter.................................. 14
3 , Spectral Content................................. 17
3.1. Limit Cycles..................................... 19
3.2. Signal to Noise Ratio............................ 24
4. Stability........................................ 29
4.1. General Stability Condition...................... 29
4.2. Overload Stability Condition..................... 36
5. Application to Telemetry Reception............... 39
5.1. Downlink Characteristics......................... 39
v
5.2. Downlink Requirements........................... 41
5.3. Single Order Architecture....................... 49
5.4. Cascaded Single Order Architecture.............. 53
5.5. Cascaded 1bit Tuner Architecture............... 55
5.6. BandPass Architecture........................... 57
5.7. Simulation Approach............................. 65
5.8. Simulation Results.............................. 66
6. Conclusions..................................... 78
7. References...................................... 81
vi
3
5
8
11
13
14
15
18
24
33
34
35
40
50
FIGURES
Comparison of frequency spectra for a
criticallysampled vs. oversampled signal
with quantization noise....................
Generic loop structure of a AX converter..
Generic integrator representation of a AX
converter..................................
AX noise shaping functions.................
Cascaded 1st order AX converter structure.
Bandpass noise spectrum shape..............
Binary quantizer1..........................
AX noise model.............................
Spectral effects of limit cycles...........
First order AX Nyquist plot................
Second order AX Nyquist plot...............
Third order AX Nyquist plot................
input spectrum.............................
First order AX system......................
vi i
5.3 Cascaded system with 2bit tuning................ 56
5.4 BAX system....................................... 58
5.5 NCO resolution vs. QSNR for BAX system........... 59
5.6 CIC frequency response, N = 2, M = 1, R = 62. ... 61
5.7 Simulated input spectrum......................... 68
5.8 Simulated BAX converter output spectrum.......... 69
5.9 Simulated tuner output spectrum.................. 70
5.10 Simulated CIC output spectrum.................... 71
5.11 Simulated baseband output spectrum............... 72
5.12 Simulated baseband output........................ 73
5.13 Simulated tuner output spectrum with C/No = 44
dB............................................... 74
5.14 Simulated CIC output spectrum with C/No = 44
dB.............................................. 75
5.15 Simulated CIC output spectrum when the NCO
uses 4bit arithmetic............................ 76
viii
Introduction
1 .
For any given signal there is a frequency band that
contains the information of interest. Typically, this
signal must be processed in some manner to extract the
information desired. For more flexibility in processing
and for complex processing a digital data format is chosen.
The most common approach to "capturing" the information in
a digital form is to sample the signal at an instant in
time and convert the sampled value to a set of binary
digits using a nonlinear mapping performed by a
"quantizer." This set is an encoded estimate of the value
of the signal waveform at the sample time. Thus an Nbit
"word" represents the estimate of the waveform at the
sample time.
The signal must be sampled at or above the Nyquist
rate to allow all the frequencies present in the
information to be clearly represented in the estimate
sequence. That is, it must be sampled at a rate that is at
least twice the frequency of the highest frequency
component of the signal. The signal must also be band
limited so as to avoid the undesired frequency components
1
above half the sample rate from folding back into the
bandwidth of interest during the sampling process. This
folding, called aliasing, is avoided if the components
above the bandwidth of interest are attenuated
sufficiently. This, however, requires a tradeoff between
implementing an antialiasing filter (AA filter) with a
sharp transition band or sampling at a higher rate and
using a less complex AA filter.
1.1. Oversampled Conversion
Bumping the sample rate up by a factor of R, called
the oversampling ratio, allows the simplification of the
AA filter for two reasons. One, the signal spectrum
occupies less of the normalized frequency axis by a factor
of R and so the signal may be naturally bandlimited to
within that range. Two, since the actual bandwidth of
interest is now limited to a range that is smaller by that
factor of R, the AA filter doesn't have to be as sharp to
do the job of rejecting aliasing frequencies. The
filtering function is now split into two parts. The first
part is the AA filter which is performed before the
conversion to the digital domain. The rest of the
filtering can be performed digitally on the sampled
2
sequence to reduce the bandwidth of the signal to that of
interest. This digital filtering is typically performed at
the same time as the down sampling by R.
Fig. 1.1 Comparison of frequency spectra for a
criticallysampled vs. oversampled signal with
quantization noise.
If the quantizer is an ideal uniform staircase
parallel a/d converter, it introduces a wide band
quantization error if the input signal doesn't saturate the
quantizer and is a "busy" signal above the LSB input level.
Since the noise power introduced is not dependent on the
sample rate but on the resolution of the quantizer and is
uniformly spread over all the frequencies up to the sample
rate, an oversampled conversion approach spreads the noise
power over the wider bandwidth due to its higher sample
3
rate. This means that the portion of the quantization
noise spectrum above the signal can be removed during
subsequent filtering and decimation thus improving the
signal to quantization noise ratio (QSNR). This is
illustrated in Figure 1.1. Using this approach, the QSNR
is improved at the rate of 6 dB per octave of over
sampling. Therefore, Oversampled Analog to Digital
Conversion (OSADC) refers to any conversion approach that
takes advantage of oversampling to reduce the QSNR.
1.2. DeltaSigma Conversion
Since the QSNR improvement is rather slow (over
sampling by 1,000 yields about a 30 dB improvement) for the
uniformly distributed quantization noise, deltasigma (AS)
converters shape the quantization noise and push it away
from the bandwidth of interest out into the higher
frequencies that are subsequently filtered. AS conversion
is characterized by the addition of a feedback loop to the
converter to do this quantization noise shaping. A typical
representation of the loop structure is shown in Figure
1.2. This approach derives its name from its similarity
with the delta channel coding approach of information
4
theory whose output was the difference between the current
input and the previous output.
Fig. 1.2 Generic loop structure of a AX converter.
Conceptually, the added loop's purpose is to feedback
an error signal from the output of the quantizer to correct
for the noise introduced by the quantizer.
The noise shaping effect of the AX conversion means
an oversampled conversion system with a smaller over
sampling ratio can provide a QSNR, and hence effective
bits" of resolution, equivalent to a straight oversampled
converter. It is possible, using oversampling, for a
binary quantizer to be used to convert a signal to a very
high resolution digital word. Since a binary quantizer
5
only has one step it cannot have a nonlinearity problem,
therefore the single order AX converter has no theoretical
limit for its resolution improvement [1]. In addition the
single order AX converter is relatively simple to
implement.
The AX converter, by virtue of its simplicity, trades
off resolution of the quantizer with the ability to run at
a faster rate and end up with more resolution after
filtering and decimation. With the advent of faster VLSI
circuits it has become a cost effective solution for some
conversion requirements. However, the necessity to over
sample a signal when it contains high frequency components
of interest is the limiting factor in the application of
this technology to date. Most applications have been
limited to audio signals or to telephony or ISDN
applications because of high volume and suitability to
lower frequencies [2] [3]. For this reason only a few
applications to signals in the megahertz range have been
documented and have been limited to around 50 MHz or under
[4]. No applications of a bandpass AX converter have been
found. The application of AX conversion to telemetry
reception is different only in that its bandwidth has been
6
translated up to the upper megahertz range. This can be
accommodated, even used as an advantage as will be seen.
7
2 . AX Converter Structure
The general structure of a AX converter depicted in
Figure 1.2 can be also be formulated using an Lth order
integrator in the feedforward path that integrates the
difference between the input and the previous output. This
equivalent structure is illustrated in Figure 2.1. This
view emphasizes that the AX converter integrates the
conversion errors of previous samples. This helps in
understanding how the converter cannot provide anything but
a crude, single bit estimate of the input.
Fig. 2.1 Generic integrator representation of a AÂ£
converter.
8
However, the correction to the conversion error is
present in subsequent outputs from the converter. This
means that there is a delay involved in generating a
conversion estimate. Indeed, unlike the typical parallel
converter whose output is a representation of the input at
one sample time, the AX converter produces an estimate of
the signal based on many input samples and quantizer
outputs. Therefore, the filtering and decimation functions
that follow the conversion loop are an integral part of the
conversion process seeing that the output is "encoded"
coming out of the quantizer and must be "decoded" by the
filters in order to provide an accurate estimate of the
input signal. That is why it may be helpful to consider
this type of conversion a "serial" analog to digital
conversion.
2.1. Single Loop Structure
The single order converter is the most basic form of
AX converters and can be implemented as depicted in either
Figure 1.2 or Figure 2.1 with the transfer function H(z)
equal to z"1. Its feedback transfer function is a simple
delay element and the function Q(x) is a simple binary
quantizer. The input to the converter is a continuous
9
time, continuousamplitude signal. The output of the
converter represents the input waveform but has been
sampled in time and quantized in amplitude. The
quantization is obviously performed by the quantizer, Q,
and the sampling in time is performed by the clock that
gates the delay elements of the H(z) blocks.
Since the single loop AX converter is trying to
provide an estimate of the input in the form of the average
of a stream of only two values, the output is always
flipping between the two "rails" of the quantizer. But how
can a signal that is only one of two values provide an
estimate of its input that is arbitrarily accurate? The
answer is that an "average" of a number of output samples
must be viewed as the estimate of the input value. This
averaging is performed by the decoding filters and, in
essence, decodes the converter output.
The decoding filter's purpose, seen from the frequency
domain, is to remove higher frequency components from the
converter's output spectrum. Figure 2.2 shows the shape of
a first order converters noise magnitude response. This
curve illustrates the envelope of the quantization noise
generated by the converter.
10
Fig. 2.2 AZ noise shaping functions.
This characteristic shape is the reason behind the
utility of oversampling. As the oversampling ratio gets
larger, the bandwidth of interest is compressed toward the
origin as it takes up less and less of the total sampled
spectrum. This compression means that less of the
quantization noise is inband and the subsequent filtering
of the quantization noise at frequencies above the
bandwidth of interest results in the removal of most of the
total noise power.
So, getting an estimate of the input to the resolution
necessary is a function of oversampling the signal enough
so that the input spectrum is compressed into the notch of
11
the noise spectrum then filtering the noise out above the
bandwidth of interest.
2.2. Higher Order Loop Structures
By changing the loop filter, the noise shaping can be
modified to push the quantization noise more effectively
away from the origin. This means that even less of the
noise power is present at lower frequencies. The block
diagram of the converter remains the same, but the feedback
transfer function changes from a simple delay element to
(1 z_1)n 1. The resulting change in noise shape can be
seen in Figure 2.2 for n = 2. This is termed a nth order
multiple loop structure because the loop filter can be
implemented by substituting a cascade of n integrators for
the integrator in Figure 2.1.
Another way of getting a second order noise shaping
response is by cascading two first order stages and
including some stage combining functions. The structure of
a cascaded first order converter is shown in Figure 2.3.
The input to the second stage is the quantizer error signal
from the first stage. The noise shaping performed is
equivalent to the double order loop converter but allows
12
the white noise assumption about the quantizer noise to be
valid for a more general class of inputs. The quantizer
error process has been found to be white for DC inputs and
nearly white for sinusoidal inputs [5].
Fig. 2.3 Cascaded 1st order AX converter structure.
2.3. Bandpass Structures
So far all the structures mentioned require that the
signal of interest fall inside a noise shaping notch at the
origin. However, it is possible to use a feedback transfer
function that places the zeros in the noise transfer
function at nonzero frequencies. For example if the
feedback transfer function is a simple second order delay.
13
the noise transfer function will have two notches. One
notch will be at a frequency of zero and the other will be
at half the sample frequency, if the feedback transfer
function is z~3 the noise transfer function will look like
Figure 2.4.
40 
0 0.1 0.2 0.3 0.4 0.5
Normalized Frequency
Fig. 2.4 Bandpass noise spectrum shape.
2.4. Decoding Filter
As was mentioned earlier, the filtering and decimation
that follow the AÂ£ converter must be considered part of
the conversion system. The signal of interest is encoded
in the pulse stream output by the quantizer and must be
recovered. This is most intuitive when a boxcar (moving
14
average) filter is used to recover a simple signal from the
output stream produced by a single order loop. If the
input to the system of Figure 1.2 with a quantizer
described by Figure 2.5 is +0.25 u, then the output of the
quantizer will settle to a steady state whose output
samples repeat the pattern, +A/2, +A/2, +A/2, A/2 where
A/2 are the quantizer rail output values.
Q(u) A/2 i
u A/2
Fig. 2.5 Binary quantizer
If the +A/2 rail and the A/2 rail are interpreted as
a positive and negative floating point of one respectively,
the output stream will be 1.0, 1.0, 1.0, 1.0. If a moving
average filter with four taps and using the same number
system processes the sequence, the result will be a
15
constant value of 0.5 which corresponds to the input level
because it is 3/4ths the distance from the negative rail
value to the positive rail value.
Now if integer arithmetic is used, let the +A/2 rail
and the A/2 rail be represented by a positive and a
negative one in two's complement representation of a 4bit
number system respectively. The output stream will be
1,1,1,1. If a moving average filter with four taps and
using the same number system processes the sequence, the
result will be a constant value ofl+l+ll=2. This
approach for boxcar filtering will yield a faithful
conversion if the number system can accumulate all the taps
with the same sign without overflow and no division is
used.
Notice that if a boxcar filter with 3 taps is used the
resulting output stream would not be a constant but would
be a stream of 3,1,1,1. This is due to the boxcar filter
not attenuating the noise spectrum adequately enough. In
the case with the 4 taps, the notch in the filter spectrum
lined up with the spike in the AX output spectrum. To
investigate this more a better understanding of the AX
spectrum in order.
16
Spectral Content
3 .
One of the objectives of AX conversion is to spread
the quantization noise across a wider bandwidth than the
signal of interest and to shape the noise so that most of
its energy falls outside of the bandwidth of the input
signal and can be removed by the use of some form of
filter. The quantizer introduced noise has a
characteristic shape as illustrated previously.
This shape is due to the transfer function acting on
the noise injected by the quantizer. To see this the
quantizer must be modeled as a noise source. The model
used is shown in Figure 3.1.
The converter output is then derived from:
Y(z) = X(z) + N(z)
(3.1)
X(z) = V(z) ~H(z)Y(z) + H(z)X(z)
(3.2)
Combining these, the output is then just:
Y(z) = U(z) + N(z) H(z)N(z)
(3.3)
So if H(z) takes the form of:
H(z) = l(lz~B)L
(3.4)
17
the quantization noise transfer function takes the form of:
(3.5)
Yh>=( ]z~B)L
N(z)
Fig. 3.1 AX noise model.
The shape and position of the notches in a AX
converter spectrum are controlled by number of integrators
and the order of each integrator in the loop. The order of
the loop L defines that L zeros create each notch in the
spectrum thus defining the notch shape. The larger L is,
the wider the notch becomes. The B delay elements in each
integrator means that there will be B notches in the
spectrum. This is the way a BAX converter provides a
notch at a nonzero frequency.
18
For a typical AX L order converter B is one. This
places L zeros at z = 1 in the z domain and the frequency
response of the noise transfer function is that of a high
pass filter. Effectively, a high pass filter sits between
the noise source and the output of the converter.
For a typical BAX first order converter L is one.
This places 1 zero at the B roots of z = 1 in the z domain
and the frequency response of the noise transfer has B
notches equally spaced between 7t and k with one at zero.
3.1. Limit Cycles
The preceding derivation makes no assumption about
what the noise injected by the quantizer looks like. Its
level and its spectral qualities do not affect how the
shaping occurs. Normally the noise is assumed to be
spectrally white which is a valid assumption only under
certain conditions.
Since the quantizer is a nonlinear element, the
spectral distribution of the quantizer noise is dependent
on the input signal. The number and energy content of the
spikes in the spectrum is dependent on the "rationality" of
the input signal [6]. For a DC input (or slowly changing
19
AC that is effectively a DC for the period of the
conversion) whose value can be represented as a rational
function with a small denominator, the converter's output
spectrum does not even approach a white spectrum but
contains a few large spikes.
The deltasigma converter, by nature, produces many
higher frequency components during the conversion
procedure. These components are the BohrFourier series
solution to the nonlinear system [7]. The spacing of the
frequencies in the response is dependent on the input
amplitude and are not evenly spaced. However, during
certain conditions these high frequency components coalesce
into fewer, higher energy spikes that may not be attenuated
completely. The existence of these tones in the output
corresponds to an output sequence that contains a limit
cycle pattern.
For a limit cycle to exist in the output it is
necessary that the sum of L input samples be a multiple of
the quantizer output amplitude. Given a single order
converter, the L consecutive difference equations
describing the converter are:
20
x(l)x(0) = u(l)Q[x(0)J
x(2)x(l)=u(2)Q[x(l)]
(3.6)
x(L)x(LJ) =u(L) Q[x(L1)]
Adding these L. equations together and assuming that a limit
cycle exists gives:
Since the left side of equation 3.7 is zero because of
the limit cycle assumption, the value of the sum over u{i)
must equal the sum over Q[x(i1)]. The output of the
quantizer, Q, is always one of two values and the sum is a
multiple of the quantizer output amplitude meaning that the
sum of u over a limit cycle period must be a multiple of
the quantizer output levels. The difference of the two
sums is a state variable of the integrator. Since x(L) =
x(0) at the end of L samples and the integrator is again at
zero, the converter is essentially starting over. This
results in the output exhibiting a limit cycle.
This occurs when u is a DC input. For the DC input,
equation 3.7 can be rearranged and written as:
L
L
(3.7)
i=l
i=l
v yQlx(i)] A P
h L B L
(3.8)
21
where A and B are relatively prime integer factors of the
input level u. in this case with binary quantizers, P can
be viewed as the number of positive output samples in the
limit cycle.
So for DC inputs, if the input level can be expressed
as a ratio of integers, the output is a limit cycle of
length B with A positive output samples per limit cycle.
The necessary conditions for limit cycles are valid for all
quantizers in single loop converters. This is also shown
by Friedman for double loop converters [8].
Something similar occurs for a sinusoidal input. If
the input frequency is an integer submultiple of the sample
frequency, equation 3.7 can be satisfied and the
quantization noise power coalesces into the spectra of the
input frequency and all its harmonics and half harmonics
[9]. This may be expected because the output is a square
like wave train. The difference is that the amplitudes of
the spectra does not tail off the farther the harmonic is
from the fundamental as it does in the spectrum of a square
wave. Instead, the amplitude of the harmonics is
distributed in a way that looks random. This effect is
shown in Figure 3.2 for a limit cycle where the input
signal is a sinusoid whose frequency is an irrational
22
submultiple of the sample frequency. Also shown (with
dots) is the case where the input signal has a frequency
that is an integer submultiple of the sample frequency.
The possibility of limit cycles occurring in the
output of the converter causes problems in the decoding of
the converter output because they change the structure of
the output spectrum. The output spectrum is shown to be
dependent on the input rationality for DC inputs such that
the frequency separation of the spikes in the output
spectrum is a function of the input amplitude divided by
the full scale input amplitude of the quantizer [10].
The existence of the limit cycle, as mentioned before,
allows the quantization noise power to be concentrated into
fewer spectral components effectively raising the level of
these frequencies. This is not desirable since they may
represent unwanted harmonics introduced into the output by
the nonlinear quantizer element in the converter. The
"dots" in the Figure 3.2 represent the spectrum for the
limit cycle case.
As the length of the limit cycle grows, the energy in
the limit cycle frequencies is spread over more frequencies
effectively lowering the noise floor and improving the
signal to noise ratio.
23
60p
50
Normalized Frequency
Fig. 3.2 Spectral effects of limit cycles.
3.2. Signal to Noise Ratio
A common measure of the utility of a signal for use is
its signal to noise ratio (SNR). This is a measure of the
ratio of signal power to noise power and is usually
expressed in decibels. The noise power can be from a
number of sources. This research is concerned only with
the input noise and quantizer noise sources. Input noise
is significant in that it can be useful to the conversion
process in that it provides a dither signal to the
converter aiding the conversion by keeping the input
"busy." However, noise at the input is not shaped but is
24
treated as any other input and is converted. So the SNR at
the output of the filter is affected by the carrier to
noise ratio (C/No), but for a large C/No the QSNR
dominates.
A uniform quantizer provides an encoded estimate of
its input value that has some error associated with the
conversion due to finite register length. This error is
frequently modeled as a noise process. This process
approaches a white process if the following assumptions
hold [11]:
{1] The error sequence is a sample sequence of a
stationary random process.
(2) The error sequence is uncorrelated with the input
sequence.
(3) The random variables of the error process are
uncorrelated.
(4) The probability distribution of the error process is
uniform over the range of the quantization error.
Assumption (3) has been shown to be incorrect if the
input is a constant or if it is a pure sinusoid [12].
However, the noise process is reasonably close to a white
process, especially if the input remains busy.
25
The noise process is a zero mean process if the
quantizer is defined as shown in Figure 2.5. The
probability distribution function is:
(3.9)
The process variance is then:
(3.10)
and the process autocorrelation is:
Rff(n) &n2
(3.11)
The noise process spectral density is the Z transform of
the autocorrelation and is:
The converter output is given by equation 3.3 and the
SNR is the ratio of the signal power present in u to the
noise power injected by the quantizer and shaped by the
noise transfer function. The spectrum of the shaped noise
is just the spectrum of the injected noise transformed by
the magnitude of the noise transfer function.
SN(z) = Z{RN(n)} = Â£ = cN2
(3.12)
n
Sy(z) = Sn(z)H(z)H*(z) =
(3.13)
26
This needs to be evaluated with z
edw. So SY(ejw)
for the various AX converters is:
Sy(eJW) = 2 cn2(1 cosw) ;single order
2 2
= 4 (1 cosw) ;double order
= 2 Of/2(I cos3w) /bandpass
(3.14)
In order to compute the SNR due to the quantization
noise the frequency response of the decimation filter must
be known. If the frequency response of the filter is
H(e:iw) then the QSNR is:
If the signal power is closely approximated by the
power in the carrier, the filter is an ideal filter whose
cutoff frequency corresponds to half of the final sample
rate (no aliasing), and the spectra are symmetric about
zero, the QSNR becomes:
QSNR =
(3.15)
jSyleinHie^)\2 dw
QSNR =
1
(3.16)
jSyfe^)\H(e^w)\2 dw
o
21
where A is the input signal amplitude of the carrier, wc is
the cutoff frequency of the filter and is equal to tc/R.
It is obvious that the QSNR increases as the over
sampling rate increases due to a respective reduction in
the cutoff frequency of the decimation filter. So the QSNR
formulas for the various AX converters are:
3xA2
QSNR=5 ; single order
Am2(wc sinwc)
3jiA*
(3wc 4sinwc + sin2we)
2
; double order
3tzA
(wc j sin3wc)
; bandpass
(3.17)
If the parenthetic terms are approximated try a Taylor's
series and recognizing wc = 1/R, R = 2L, and A/Am = 1 (for
full scale input amplitudes), then:
QSNR
"7
30R1
It4
2R3
y = 9 03L 6.93 dB ; bandpa s s
n
= 9.03L + Z61 dB ; single order
= 15.05L5.12dB ; double order (3.18)
Comparing this to an Lbit parallel converter the QSNR is:
322L
QSNR =
= 6.02L + 1.76dB
(3.19)
28
Stability
4 .
Since this type of converter contains feedback, the
question of stability naturally arises. Under what
conditions will a AX converter become unstable and hence
useless?
4.1. General Stability Condition
What are the characteristics of a AX converter when
it is unexcited? For most linear systems this question can
be answered with a Root Locus, Nyquist, or Bode analysis.
Since the AX converter is a nonlinear system, these
approaches cannot be applied, at least without
modification. The approach taken here is a modification of
the Nyquist analysis to handle systems containing non
linear elements.
The Nyquist Stability Theorem assumes that there is
only one critical point in the GH plane that is used to
determine stability. For nonlinear systems this
assumption is modified to define a locus of critical points
[13]. This locus of points is the image on the GH plane of
the "describing function" of the nonlinear element. The
29
describing function is defined as the complex ratio of the
fundamental component of the output of the nonlinear
element to its input. So if the locus of the describing
function is "encircled" by the locus of GH{s) an
instability condition exists. The Nyquist equation remains
unchanged and is still z = N + P, where Z and P are the
number of zeros and poles outside the unit circle
respectively, and N is the number of counterclockwise
encirclements of a critical point.
The describing function analysis approach effectively
transforms the quantizer into another nonlinear element, a
variable gain block. Once this is done, the transfer
function of the output of the converter, q, with respect to
the input, u, can be derived and the characteristic
equation of the system can be analyzed for stability with
the modification that the describing function locus is a
set of critical points.
So starting with a general AX converter as shown in
Figure 1.2 and representing the quantizer with a gain block
K yields:
Y(z)=K X(z) (4.1)
X(z) = U(z)H(z)[Y(z)~X(z)] (4.2)
30
Solving equation 4.2 for X(z) and plugging back into
equation 4.1:
Y(z> =
K
[U(z)~H(z)Y(z)I
lH(z)
(4.3)
Solving equation 4.3
Y(z) =
for Y(z):
K V(z)
1H(z) + KH( z)
(4.4)
The characteristic equation is the denominator of
equation 4.4 which can also be expressed as:
1 + KG(z) = 0 (4.5)
where:
G(z) =
H(z)
lH(z)
For a first order converter:
H(z) = l(lz~1) = z"1
(4.6)
(4.7)
then:
Glst(z) =
1
z1
(4.8)
This system has Z and P both equal to zero so N must
be zero as well for stability. The plot of GisC and 1/K on
the GH plane is shown in Figure 4.1. From this diagram it
is obvious that for some value of K the system will be
31
unstable because the two curves intersect. But is this a
marginally stable operation point or an unstable point? A
disturbance that moves the operating point to the right
from the point of intersection along the 1/K locus
describes an operating point with a larger value of K which
corresponds to a smaller state variable value. However,
any point to the right of the intersection is a point that
has N = 1 indicating that the state variable will grow in
amplitude while operating in this region. This will drive
the operating point back to the left. Similarly,
displacement to the left results in an operating point that
has N = 0, so the amplitude of the state variable will tend
to decay resulting in a movement back to the right.
Therefore, the point of intersection is a stable operating
point.
Furthermore, at the point of intersection, G(z) = 0.5
+ jO.O, which means z = e^ = 1 + jO which means that w =
(2k + l)7t. if k = 0 is chosen, then w = % which
corresponds to a frequency of oscillation at the operation
point of half the sample frequency. So Nyquist analysis
predicts a stable oscillation is sustained at a frequency
of half of the sample rate. This is indeed what is seen to
occur.
32
4
2 1.5 1 0.5 0 0.5 1
Real Axis
Fig. 4.1 First order AX Nyquist plot.
For a second order AX converter:
H(z) = l(lz~1)2 =2z~!z~2 (4.9)
then:
2nd(z)=~a <410>
(z1)
This system also has 2 and P both equal to zero so N
must be zero as well for stability. The plot of G2nd and
1/K on the GH plane is shown in Figure 4.2. Just as in
the first order case, the system has a stable operating
point at the intersection of the two loci. Also the
frequency of operation is half of the sample rate.
33
4
4>
5 43210 1
Real Axis
Fig. 4.2 Second order AX Nyquist plot.
For a third order AX converter:
H(z) = 1(1 z'1)3 = 3z~3 3z~2 + z~3 (4.11)
then:
cw=(4.12)
Like the other systems this system has Z and P both
equal to zero so N must be zero for stability. The plot of
Gsrd and 1/K on the GH plane is shown in Figure 4.3, Now
there are three intersection points of the two loci. .The
leftmost intersection points both correspond to the
operation points for the first and second order AX
converter as the stability and frequency derivations follow
34
the same arguments except that the operating point has N =
2 inside the "eye." The rightmost intersection is not a
stable operating point and operation at this point will
move left.
For a first order bAX converter with three notches:
H(z) = 1 (1 z~3 ) = z~3 (4.13)
then:
GbP(z) = ~p~j (414)
Lastly, this system has also z and P both equal to
zero so N must be zero stability. The plot of G^p and 1/K
on the GH plane is the same as the first order AX shown in
35
Figure 4.1 and therefore the stability analysis is
identical and it has a stable operating point and can
function as a AS converter.
4.2. Overload Stability Condition
The previous discussion on stability investigated the
stability of the feedback loops for AS architectures given
a zero input and found that these systems exhibit a stable
oscillation point that corresponds to the desired response.
But is the converter stable in a bounded input bounded
output (BIBO) sense?
A AS converter can be defined to be stable if its
conversion error is always bounded for a bounded input.
This type of stability is closely related to the concept of
a converter operating in a nonoverload mode. Converter
overload is defined as the condition where the quantizer
error remains less than output step size of the quantizer.
The condition to guarantee no overload operation is
developed by He [14]. Starting with the difference
equation of the system in Figure 1.2 and working in the
sampled time domain:
x(n) =y(n)e(n) = u(n) + H(z)e(n)~e(n) (4.15)
36
where H(z) is defined as in equation 3.4 with B = 1.
Recognizing that H(z) can be written as a sum with binomial
coefficients if (1 z1)L is expanded then:
L
x(n) =u(n) + Â£(J)l(f)e(nl) (4.16)
1=0
If the quantizer is not overloaded up to the n1
sample, then using the identity
L
Z(t)=2L (4.17)
1=0
yields
L A
\x(n)\ <\t(n)\+X(i )\e(n l\
i=o 2
So for an overload free quantizer at the nth sample, M and
b must be chosen to satisfy
\b\<(M + l2L) (4.19)
2
where b is the bounding amplitude of the input to the
converter (u), M is the number of levels the quantizer
output (y) can take and is an even number, and L is the
order of the converter. This is the relation to guarantee
that the overload condition will not occur. For example,
for a single order converter the condition is:
37
(4.20)
If this condition does not hold for an input signal
the result is that the output will not provide a faithful
estimate of the input signal. If the magnitude of the
input signal exceeds A/2, the output will be driven to one
of the quantizer rails and the quantizer error will tend
toward infinity. This will continue until the input
again ventures inside the valid input range. For
oscillating signals with large amplitude the output will be
pegged to a rail until the input swings through the valid
input region at which point the output will swing to the
other rail.
38
5. Application to Telemetry Reception
The goal of this section is to investigate the
suitability of a AX converter as part of a telemetry
receiver. The main functions necessary to implement a
receiver are sampling, filtering, and tuning. As with any
system, the modification of the A/D converter element may
change the requirements of the other functions. Therefore,
the following analysis will try to address all the above
functions as part of the investigation as to the
suitability of a AX converter to telemetry reception.
5.1. Downlink Characteristics
First of all, a digital telemetry receiver has as its
input an intermediate frequency (IF) carrier modulated with
baseband data and provides as output a sequence of sampled
estimates of the baseband data.
A major distinctive of IF telemetry is the high
frequency of the input signal. Normally the frequency of
the IF carrier is between 50 and 100 MHz. Although the
carrier is at a high frequency, the information of interest
has a much lower bandwidth, somewhere around 30 kHz. In
39
addition, the input is bandlimited such that its bandwidth
is 25 MHz around the carrier. The spectrum of the input
signal looks something like Figure 5.1. The high input
frequencies place a burden on the conversion system to
handle sample rates of 200 MHz and above.
Another characteristic of the telemetry stream is the
carriertonoise ratio. This is a measure of the strength
or utility of the telemetry signal at the input to the
converter. The minimum C/No places a requirement on the
conversion system to maintain a signal to noise ratio
40
during processing that does not cause degradation of the
C/No margin.
5.2. Downlink Requirements
The application of a deltasigma converter to this
environment poses a few questions. "Can I sample fast
enough?" "Can I filter fast enough?" "What kind of
decoding filter should I choose?" The following analysis
explores some answers to these and other questions.
Since the signal into a AX converter is usually over
sampled by a factor of R and the telemetry input rate is so
high, the goal in applying the AX converter to a
telemetry receiver is obviously going to be to minimize the
oversampling rate. This concern will be highlighted by
the first simple approach to the problem.
The output of the AX converter contains the input
information in an encoded form and lowpass filtering
performs the decoding needed to recover that information.
The ability of the AX converter to supply equivalent
resolution as that of a parallel converter is dependent on
the ability of the filtering to attenuate all of the high
frequency components created by the quantizer to such an
41
extent that they do not contribute significantly to the
output. In addition, since the filtered signal will be
decimated by a factor of R (normally large), the filter
must be extremely narrow. This is a narrow filter because
when it comes time to decimate the output of the AX
converter, the filter must remove the high frequency
components from fs/2R to fs/2 to prevent images of the
noise from folding into the information of interest.
Therefore, a narrow filter with a high attenuation
rate is needed. This requires a high number of taps for a
FIR filter implementation and the gain in SNR that can
result from such a narrow filter, if it is needed, requires
that the arithmetic used in the filter be able to represent
that resolution at each stage of its processing. The
result is that there is a lot of processing to perform to
decode the converter output.
Since the bandwidth of interest is relatively narrow
compared to the carrier, once the signal is converted to a
digital form it is desirable to reduce the bandwidth of the
sampled data stream. First the information of interest
must be translated from the frequency of the carrier to
something much lower. This is usually implemented as a
42
mixer which performs multiplication by a sinusoid or a
complex exponential.
This is another difficult function to implement at
such a high sample rate. Parallel multipliers at this rate
are not available or hard to come by depending on the
sample rate. To ease the implementation of the NCO it
would be desirable to limit the width of the NCO output,
but this will affect the phase and frequency resolution of
the NCO. The nature of the effect is that the NCO will not
multiply by a pure exponential frequency as it translates
the input spectrum. Rather, the NCO output is a complex
sinusoid with an injected quantization noise. This may
affect the performance of the conversion architecture.
The tuning operation performed by the complex
multiplication of these two inputs, each with quantization
noise, results in a signal that can be described by the
convolution of their respective frequency spectrums. The
frequency spectrum of the single order AX quantizer output
can be modeled as in equation 5.1.
r ~j2nk >
l o N
(5.1)
43
The frequency spectrum of the NCO output can be modeled as
in equation 5.2.
W*)=
^NCO
S[kkNCo)+
Anm
(5.2)
In equations 5.1 and 5.2 n is the number of bits of NCO
quantization, nq is the number of bits of AX quantization,
Aq is the AX converter input amplitude, Aqm is the full
scale amplitude of the AX quantizer, anco is the NCO
amplitude, and Anm is the full scale amplitude of the NCO.
So, the convolution of the two spectrums (yq, Ynco)
proceeds as follows:
Nl
yT(k) = V Vr, =^t IfiM W* )
N^n
mU
T Nl
=y
(s(m  )+8(m+*e))+
Aqm
f j2mn ^
1e N
J.
X (5.3)
44
*V(*) = ~Z ^^Â§^(5(m"kQ)+5(m+*e))5(*~m~kNC0)
IW=0*
f j2iunN
ie *
S(kmkpfC0)
1_
N
+ >Wo
243 N V2
+^ 2 I5(m ~ e)+5(m+e)!
, v r, ^""v
243 N 243 N2n~1
^42  ^co+^e)+^ *wco *e)]
A A ( ~J2n(k~kNCo) ^
 Anco
2VIw V2
*
y.
7e
+2
As
*JVM
M
W
42 243 Nr1 243 N 241 N2n~1
N
(5.4)
The first of the four terms is the signal frequency
spectrum. The other terms constitute the noise that is
generated in the system due to AX and NCO quantization.
This frequency spectrum is filtered by subsequent DDF
states. The QSNR of the tuned output at the output of the
filter(s) is the ratio of the power in these two quantities
when summed over frequencies where k is less than the ideal
filter cutoff frequency (kc).
45
QSNR = ; kÂ£kc
P,=\AqA
SCO
!5.5!
Pn =
K 1 Jfck Aqmanco f ~J'2n(k~kNCo)' 1 p n
246 N
_ l )
 AqANM 
46 N? 6N2n J
Evaluating the sum and performing a Taylor's series
expansion on the exponential term gives:
{2kc + l)
Aqm anco
246 N
AqmANCq
246 N
)2vkNCo r k.
 _
k=l
2nk
cos
N .
t A? ^NM K ( AqmAnmK
46N2n 6N2n
= ~AQ^Anco j4nkNC0 Aqm ANCq 2n2 3
246 N N c 246 N N2 c
 &Q Anm ke AqmAnm kc
46? N 6 2n N
(5.6)
where the approximation is valid if both k and kNC0 are much
less than N. If all the amplitude values are normalized so
that AqM, Anm, anco are all one and Aq is onehalf then:
46
r, =lf
j4n kc kNCp 2n2 kc3 ^ 1 kc  1 kc
246 N2 246 N3 462" N 6? N
2N2kc+Z=N2kc2n22nkc3+ j4% 2n N kc kNCO
_______Vo____________________________
246 2nN3
(5.7)
QSNRmox =
_____________ 246 2nN3_______________
2N2 kc + j=N2 kc2n2 2n kc3 4 j4n 2n N kc kNCO
Equation 5.7 indicates that there are three quantities
that determine the QSNR for a single order AX converter
with an nbit NCO tuner. They are the number of bits in
the NCO arithmetic (n), the tuning frequency (kNCQ/N), and
the filter cutoff frequency (kc/N). As expected, the
greater the resolution of the NCO arithmetic, the larger
the QSNR up to a limit imposed by either the value of
kNco^N or kc/N. However, the first term in equation 5.7(b)
is the limiting term for most AX converters.
The receiver must provide the baseband processor a
signal that has enough SNR to allow it to do its job. For
a telemetry stream, the baseband processor requires
47
somewhere in the range of 9 dB of SNR for a BPSK signal in
order to get a bit error rate of 105. [15]
The worst case input condition is when the input
signal is weak because the carrier to noise density power
ratio (C/No) is at its smallest value. If C/No is at 44
dB, and the noise density power (No) is at = 124 dBm/Hz,
this places the carrier power (at 80 dB) which is small
enough to be negligible when compared to the noise power
present at the input to the converter. The composite power
present at the converter's input is No BW where the
bandwidth (BW) is, for example, 25 MHz.
Pcomp = 124 25MHz = 4 10~13 25 106Hz = 50 dBm (5.8)
y Hz Hz
So that the input to the converter will not saturate,
an AGC circuit must control the input level so that the
composite input power is down approximately 12 dB from the
full scale input level of the converter. This corresponds
to a setpoint at onefourth of full scale. This would put
the full scale input level of the conversion system at 38
dBm. Therefore, the required dynamic range at the output
of the A/D conversion system must be 38 (124) = 86 dB
in order to resolve down to the noise.
48
However, it only takes 38 (80 9)
enough resolution for an SNR of about 9 dB.
51 dB to have
5.3. Single Order Architecture
The first architecture investigated was what seemed
the simplest and most straightforward approach to
implementing a digital receiver. This architecture
consisted of the single order AÂ£ converter to sample the
signal, a DDF decimating the output down to the Nyquist
sampling rate, an NCO to perform the complex frequency
translation, and a second DDF stage to reach the receiver
output frequency. These functions were arranged as shown
in Figure 5.2.
49
Fig. 5.2 First order system.
in order to achieve the 86 dB of dynamic range needed
to push the quantization noise floor down to the input
noise floor, the oversampling ratio has to be 29*2 (600)
using equation 3.18. Since the normal minimum sampling
rate for a spectrum like this would be 200 MHz, this over
sampling ratio would put the sample rate at 120 GHz!
The DDF needs to filter and decimate the converter
output by a factor of 600. The implementation of this
filter is difficult at best due to the high sample rates.
The simplest FIR filter would be M taps where all the tap
weights are one. This is a boxcar or moving average filter
which requires Ml bbit additions to implement. The
frequency response of a boxcar filter is that of the
50
rectangular window. The rectangular window has the
following characteristics:
wfirst null = /(M + l) ; normalized frequencies
Attenuation htsidÂ£hbe = 15dB
The aliasing components above half the new sample
frequency must be removed before decimation. This means
the first null of the filter must be at n / 600 which
requires that M = 1,200 taps. The SNR at the output of the
filter is affected by C/No, but for a large C/No the QSNR
dominates. The QSNR for an ideal filter would be 86 dB
using equation 3.18. Since this is better than the QSNR
for any actual filter implementation, it represents the
upper bound on the resolution needed in the arithmetic in
the filter. Since 86 dB is about 1/20,000th, the
arithmetic must provide better than 14 bits resolution to
avoid raising the quantization noise level above that
introduced by the binary quantizer. So 1,200 14bit adds
are required to implement this DDF running at 120 GHz.
The first DDF stage drops the sample rate down 200
MHz. To continue with the extraction of the baseband data,
the bandwidth of the signal must be reduced. By
translating the carrier frequency to zero this bandwidth
51
reduction is accomplished. However, the mixer must perform
14 by 14bit multiplications and provide 14 bits out.
The second DDF stage, like the first, filters the
sequence so that the decimation down to baseband data rates
can be performed. This is a decimation by 2,666. This
means that an extremely narrow filter is necessary to
remove any aliasing components. A boxcar filter this
narrow would require 5,333 taps for a first null to be at
the new Nyquist frequency. Although now the data rate is
significantly slower than for the first DDF stage, the
multiplications are now 14 bits by 14 bits and the large
number of taps required means a huge processing job.
An upper bound on the QSNR at the output of the second
DDF stage can be derived based on the assumption that all
of the quantization noise above a normalized frequency of 7t
referenced to the final sample rate is filtered out by the
two DDF filters. Using equation 3.18, the QSNR is 189 dB
based on the decimation by 1.6 million.. This is, however,
unachievable because of the sheer processing power
required. Even in a nonrealtime environment the
processing was too much to handle. The simulation
performed for a single order AX converter could not handle
that kind of decimation rate.
52
This receiver implementation has a couple of
implementation problems. The first is the high frequency
of the converter. The 120 GHz operating frequency is high
enough that there is no hardware available to implement the
loop. The second problem is requiring the tuner to run at
200 MHz or faster. Since the tuner must be perform m by
14bit multiplications at this rate, this is a problem as
far as actual implementation is concerned.
5.4. Cascaded Single Order Architecture
To try and ease the technical problems of implementing
the single order AZ converter in the first approach, a
higher order AZ converter can replace the single order
converter shown in Figure 5.2. This slightly more complex
converter can be implemented as a cascaded pair of first
order loops.
In order for the system to achieve the 86 dB of
dynamic range that is needed, equation 3.18 indicates the
oversampling ratio has to be 260 (66). This would put
the sample rate at 13.2 GHz. Since the AZ converter is a
second order system, the output is a 2bit wide stream.
53
The DDF needs to filter and decimate the converter
output by a factor of 66. Similar to before, the boxcar
filter would require 132 taps to filter out everything
above ic / 66. The filter, for this architecture,
unfortunately does not have 1bit inputs as did the
previous architecture, it has 2bit inputs which must be
multiplied against each tap. The QSNR for an ideal filter
would be 86 dB. Since this is better than the QSNR for any
actual filter implementation again it represents the upper
bound on the resolution needed in the arithmetic in the
filter. Again, the arithmetic must provide better than 14
bits resolution to avoid raising the quantization noise
level above that introduced by the binary quantizer. The
hardware required to implement this filter would have 132 
2 by 14bit multiplies and 131 14bit additions for each
sample at 13.2 GHz. The tuner and the second filter stage
would be identical to those of the first approach.
An upper bound on the QSNR at the output of the second
DDF stage can be derived as for the first architecture.
Using equation 3.18, the QSNR is 257 dB based on the
decimation by 176,000 and again the simulations run for the
cascaded single order AX converter could not handle the
54
number of samples needed to simulate this oversampled
rate.
This receiver implementation eases the sample rate
difficulty of the first approach by dropping the rate to 12
GHz. However, the second problem of running the tuner at
200 MHz remains.
5.5. Cascaded 1bit Tuner Architecture
Now, if the system is modified by moving the tuner
ahead of the 1st DDF stage, this would allow the tuner to
be implemented as an on or off gate controlled by the
quantizer output stream modulating the NCO output. This
architecture is illustrated in Figure 5.3.
55
Fig. 5.3 Cascaded system with 2bit tuning.
The AX converter has the same characteristics as the
cascaded architecture but now the tuner must run at the
oversampled frequency. It gains an advantage, however, in
that it only needs to perform 2 by mbit multiplications
and provide m bits of output resolution. Similar to the
first order analysis done earlier, the QSNR of this second
order architecture will improve as the resolution of the
NCO arithmetic improves up to a limit imposed either by the
tuning frequency or the filter cutoff frequency.
The DDF needs to decimate the converter output by a
factor of 176,000 following the filtering operation to
remove the high frequency components. If the filter used
is a simple boxcar filter, number of taps needs would be
56
352,000. This would give a QSNR at the output of 257 dB as
before. The word width of the filter must be at least 42
bits to maintain the 257 dB QSNR. This kind of resolution,
although available, is not necessary nor cost effective.
Since the input sequence is m bits wide, the filter
implementation is a 352,000 m by mbit multiplies and
352,000 mbit adds for each sample at the rate of 12 GHz.
The upper bound on the QSNR is identical to the
cascaded 1st order architecture. But now the technical
problem is the filter. Since an Ntap FIR filter performs
N multiplications for each sample output, and now the input
is m bits wide, this approach has made the multiplier
problem N times worse than the first approach.
5.6. Bandpass Architecture
There still remain three technical difficulties in
trying to find a feasible approach to implementing a
telemetry receiver with a AX converter. To try to find a
combination that would be technically possible, a bandpass
AX converter and a CIC DDF filter are coupled with the
tuner. This new architecture is illustrated in Figure 5.4.
57
Fig. 5.4 BAX system.
The noise shaping performed by the BAX converter has
notches at 0, 2rc/3, and 2k/3 in the normalized frequency
domain. Since the idea is to place the information of
interest at the frequency of the notch, this would mean
that the oversampling ratio should be 1.5. This would put
the sample rate at 300 MHz. The output of the converter
would be a 1bit wide stream at 300 MHz.
The tuner must run at the sample rate of 300 MHz and
provide a complex frequency translation of the BAX
converter spectrum to zero. The advantage that it has,
however, is the input is 1 bit wide. The tuner must
perform m by 1bit multiplications and provide m bits out.
Again, it is desirable that the convolution of the
58
quantizer output spectrum with the NCO output spectrum
during tuning not cause significant degradation of the
tuned spectra. For the bandpass architecture the plot of
equation 5.7 versus the number of bits of resolution in the
NCO is shown in Figure 5.5. This plot indicates that the
NCO should use better than 4bit arithmetic.
Since the tuner precedes the DDF stages, the DDF's can
decimate from the 300 MHz sample rate down to the 75 kHz
sample rate for the baseband which is an overall decimation
rate of 4,000. Furthermore, divide 4,000 into 62 for the
first DDF stage and by 64 for the second stage. This
59
should leave the signal baseband signal oversampled by
1.25 as in the previous architectures.
The combined integratorcomb (CIC) filter is an
economical implementation of a low pass filter for very
narrow bandwidth requirements. It performs very well for a
minimal "cost" if (1) the decimation rate is large, and (2)
the output stream still remains highly oversampled. Since
it is possible for both of these conditions to be met due
to the massively oversampled signal coming out of the
tuner, the CIC filter is a perfect fit for the system.
The CIC is a cascade of n ideal integrator stages
followed by down sampling by a factor of R and then a
cascade of n differentiator (comb) stages. The CIC DDF
filter has a frequency characteristic of sine11 for small
frequencies where the placement of the nulls in the
frequency response is determined by the downsampling
factor and the attenuation of the sidelobes is determined
by the number of integrator/comb stages. Cascading more
stages provides more rejection per sidelobe [16]. If the
CIC filter for this system is designed to have two stages
(n) with a decimation rate (R) of 62, then its
implementation would require two cascaded nbit
accumulators followed with a downsampler by 62 and then
60
two nbit differentiators. The filter has a power response
of:
 _ sin(RMw)2N sin(62w)4
CIC 6 * sin(w)2N sin(w)4
(5.10)
when referred to the input side of the downsampler and is
illustrated in Figure 5.6. The notches in the frequency
response fall at frequencies of 2ick/2 where k = {1,2,3,etc}
when referred to the input side. The first notch is at a
normalized frequency of 0.101 which is 27E/62.
Normalized Frequency
Fig. 5.6 CIC frequency response, N = 2, M = 1, R=62.
This means that upon downsampling, each of the
notches in the frequency response of Figure 5.6 alias to a
61
frequency of zero. Therefore a minute portion of the
spectrum on either side of each notch aliases to each side
of zero and adds into the signal. The aliasing from these
bands is rejected by about 72 dB for the chosen parameters
[17]. After decimation, the CIC output spectrum contains
just the frequency range in which the main lobe of Figure
5.6 resides. The information of interest is found at CIC
output sample rate frequencies of less than 7t/64.
Frequencies above that, contain an aliased mess of filtered
components. These need to be removed by another stage of
filtering;
This second stage of filtering can be implemented as a
FIR filter since the sample rate has been reduced to 4.8
MHz. This DDF stage should reject the noise that was
folded into the area of the first sidelobe of the CIC
filter frequency response (frequencies of tc/64 to ft when
referenced to the CIC output sample rate). It is possible
with the sample rate this low to use a more complex FIR
filter to get better rejection of the undesired components.
If a Hamming window is used, the number of taps to place
the first null at Jt/64 (it when referenced to the output
frequency) is:
= or M = 256 (5.11)
M 64
62
and provides a minimum of 53 dB of attenuation for the
sidelobes.
The upper bound on the QSNR for this architecture is
computed the same way as the previous architectures. The
difference being that the combined decimation rate is only
4,000. Using equation 3.18, the QSNR is found to be 101
dB.
It is easy to see that this conversion system eases or
eliminates the implementation problems found in applying
the AX converter to a telemetry receiver. The sample rate
is almost as low as a parallel converter and is within a
range suitable for an ECL implementation. The problem of
the tuner complex multiply is eliminated by the allowing
the function to become a gating function. The problem of
the number of taps required for a narrow enough DDF
passband to get a good SNR is fixed by the use of a CIC
filter whose characteristics lend themselves to the
generation of very narrowband filters. And the problem of
the FIR multiplication is also solved by the CIC filter
implementation due to its simple architecture of ideal
integrators, combs, and decimation. The most difficult
block to implement for this approach is the generation of
63
an nbit NCO stream at the fs/3 rate and the sample clock
at a frequency of fs.
The preceding analysis indicated that the bandpass
architecture had promise as far as implementation is
concerned. Simulation of the bandpass architecture was the
next step in investigating this approach to telemetry
reception. The purpose of the simulation was to
corroborate the SNR and stability predictions for the
bandpass architecture. To accomplish this an end to end
system simulation was chosen. But, since the decimation
rate for the whole system is so large, a large number of
sample periods had to be generated so that a few output
samples would be computed at the baseband sample rate.
The simulation was performed on a Sun Sparcstation 10
using the PV Wave application. The host's memory limits
were reached when more than 240,000 sample periods were
specified for the input telemetry stream. This resulted in
the ability to generate only about 60 output samples.
64
5.7.
Simulation Approach
To take advantage of the efficiency of array
processing in PV Wave, the simulation was structured to
compute all the input samples, then compute all of the AX
converter output samples, etc.
The telemetry input stream was a 100 MHz carrier that
was DSBSC AM modulated by a 30,000 kHz sinusoid. This was
combined with gaussian white noise such that the C/No was
at a specified level.
The input telemetry stream was converted by a first
order bandpass AX converter whose notches were at zero and
fs/3. To simulate as close as possible the analog
portions of the system double precision arithmetic was used
in the AX converter loop.
The simulation used a binary quantizer in the AX
converter loop. However, a simple binary quantizer
produces a biased output because an identically zero input
is possible and always produces a +A output. To avoid this
bias the output selected from a uniformly distributed
random sequence with outcomes of +A or A if the input was
identically zero.
65
The NCO and complex multiply functions of the tuner
were implemented to simulate the quantization resulting
from Nbit arithmetic to see the effect on the system of
additional quantization noise.
The first stage of the filtering used in the
architecture is a CIC filter. The simulation of this
filter was implemented as in equation 5.10. This approach
referred all of the actual filtering action to the high
sample rate side of the decimator. Following the filtering
the signal was decimated by 62.
The second stage of filtering was implemented by a
library package of PV Wave that implemented a FIR filter
with a desired impulse response. The desired filter
response was 75 dB of rejection and a cutoff frequency at
the new sample rate (0.005 with respect to the CIC output
sample rate).
5.8. Simulation Results
The results of the simulation fall into three
categories, (1) the general behavior of the bandpass
architecture, (2) the effect of the NCO quantization, and
(3) the SNR at the baseband output.
66
The first set of plots is arranged to provide a step
by step view into how the input signal is transformed as it
is processed by the bandpass architecture. The parameters
used in generating these plots were:
Carrier Frequency: 0.3333 of sample frequency
Subcarrier Modulation AM
Modulation Frequency 0.0001 of sample frequency
Input Amplitude 0.5 of full scale input
NCO resolution 16 bits
The first plot shown in Figure 5.7 is the spectrum of
the input to the AX converter. The main spike is actually
the twin spectra of the DSBSC modulated carrier. The
additional spectra are related to the way the carrier was
generated and may be have not been further explained.
67
100
Input Spectrum
50 
m"
O
V
! o 
c
O'
D
2
50 
100...... . i *.   1 I. i 1.1 .1 ..t ........
0.10 0.00 0.10 0.20 0.30 0.40 0.50 0.60
Normalized Frequency
Fig. 5.7 Simulated input spectrum.
The plot in Figure 5.8 shows the output of the
bandpass AX converter illustrating two of the three
notches shaped by the feedback loop. The carrier is placed
directly in the nonzero notch frequency to allow the best
possible noise rejection. The "wings" found on the top of
the noise lobe around a frequency of 0.16 are due to the
first order loop used in the converter. The noise spectrum
is usually assumed to be white, but these wings illustrate
that it is not a completely valid assumption in this case.
68
100
Quantizer Spectrum
50 
m
u
i)
D
C
O'
o
3
50 
1001.................,...........................................
0.10 0.00 0.10 0.20 0.30 0.40 0.50 0.60
Normalized Frequency
Fig. 5.8 Simulated BAÂ£ converter output spectrum.
Figure 5.9 details the spectrum following the
frequency translation performed by the tuner. Since the
tuning performed a complex frequency, translation, the two
sidebands of the modulated carrier now straddle the origin.
The second image of the carrier is not shown.
69
100
Tuned Quontizer Spectrum
50 
m
s>
D
3
c
o
50 
100 L.___ ...................................................
0.10 0.00 0,10 0.20 0.30 0.40 0.50 0.60
Normalized Frequency
Fig. 5.9 Simulated tuner output spectrum.
Following the tuner is the first stage filter. The
frequency response of this filter was portrayed in Figure
5.6. Figure 5.10 shows the resulting spectrum following
the filtering and decimation of the first stage. The
frequency of the upper sideband is now apparent at around
0.0001.
70
TOO
1st Stage DDF Output Spectrum
50 
a>
o
ai
1001 . 1.
0.002 0.000 0.002 0.004 0.006 0.000 0.010
Normalized Frequency
Fig. 5.10 Simulated CIC output spectrum.
The baseband spectrum and the baseband output are
depicted in Figures 5.11 and 5.12 respectively. There is
evident spreading in the spectrum of the baseband due to
the large combined decimation rate. The baseband output is
highly attenuated by the second stage filter because the
filter specifications were over specified. It was asked
perform a narrowband filtering function while keeping the
number of taps to 100. These are conflicting requirements
and the result is a filter that has considerable passband
attenuation. This attenuation could be remedied by using a
71
better filter (i.e. by increasing the number of taps, or by
using an HR topology, etc.).
Baseband Spectrum
Normalized Frequency
Fig. 5.11 Simulated baseband output spectrum.
All that aside, the bandpass architecture has
extracted or demodulated the information present on the
carrier and presented it at baseband. But what about the
performance of the converter given a noisy environment?
That is to say, how does it respond to a signal with some
amount of input noise?
72
Baseband
Since the converter cannot distinguish between input
signal and input noise, it treats all inputs as signals.
This means if the input noise is larger than the
quantization noise the QSNR is no longer the limit on the
performance and its effects are noticed. The input noise
starts "filling up" the notches. Figure 5.13 shows the
tuner output spectrum and the beginning of the effects of
the input noise can be seen.
73
100
Tuned Quantizer Spectrum
so
o 
50
100
0.10
Fig. 5.13
0.00 0.10 0.20 0.30
Normalized Frequency
0.40
0.50
0.60
Simulated tuner output spectrum with C/No =
44 dB.
These effects are even more pronounced at the CIC
filter output because the spectrum is zoomed in on the area
of the notch. The plot of this CIC output spectrum is
found in Figure 5.14.
74
100
1st Stoqe DDF Output Spectrum
50
m
'w*'
Â§ 0
O'
o
50
100
0.002 0.000 0.002 0.004 0.006
Normalized Frequency
o.ooe
o.oio
Fig. 5.14 Simulated CIC output spectrum with C/No = 44
dB.
Another source of noise that was considered earlier
was the NCO quantization noise. Figure 5.15 is the
spectrum of the CIC output when 4bit NCO arithmetic is
used. The noise spikes come from the convolution of the
NCO output which looks much more "squarish" and hence has
significant harmonic content. These harmonics convolve
with the carrier spike and produce the resulting "family"
of carriers.
75
100
1 st Stage DDF Output Spectrum
50 
1001________,_________.________,_________,______ .  . I
0.002 0.000 0.002 0.004 0.006 0.008 0.010
Normalized Frequency
Fig. 5.15 Simulated CIC output spectrum when the NCO
uses 4bit arithmetic.
Another result of the simulation is the comparison of
the computed SNR to that which was measured from the
simulation. The QSNR was computed from equation 5.7(b).
Figure 5.5 indicates that this equation has one dominant
term when the number of NCO bits exceeds approximately 5.
The first term in equation 5.7(b) is the limiting term. It
indicates that the BAX converter is limited in its QSNR
due to the frequency of the NCO. Plugging in the numbers
for the bandpass architecture gives a QSNR of about 40 dB.
This matches well with the QSNR numerically computed by the
simulation. The simulation returned a QSNR of 43 dB at the
76
output of the CIC filter. The computed QSNR at baseband
was significantly lower at 10 dB. This value seems to be
too low due to the aforementioned second stage DDF
concerns.
77
Conclusions
6 .
This thesis has attempted to determine the
applicability of AX converters to the telemetry receiver
function. Along the way the issue of stability of these
conversion systems was addressed. First and second order
AX converters were determined to be, by their nature,
marginally stable in that they would all oscillate at a
frequency of half the sample rate in a zero input
condition. This was a characteristic that is necessary for
them to function in the manner intended.
Also investigated were the spectral characteristics of
these types of converters. Here the result was that there
are certain conditions for which the output stream exhibits
a limit cycle. These conditions were (1) a DC input whose
level can be represented as a rational number with a small
denominator, and (2) a periodic input whose period is a
submultiple of the sample frequency. The main problem that
this introduces is an elevation of the quantization noise
floor. Also addressed was the QSNR for three of the
converter architectures. Basic formulas were derived for
the QSNR assuming that the DDF functions following the
78
converters implemented ideal filters with cutoff
frequencies at 0.5 R.
Finally, the issue of telemetry receiver
implementation was studied. Four different receiver
architectures that met the same set of requirements were
proposed. They were evaluated based on how easily each one
could be implemented. Through the first three
architectures, five major implementation problems were
identified that severely restricted the suitability of each
of these approaches. The final architecture addressed four
of these five problems and either eliminated or reduced the
concern. This architecture was simulated to corroborate
theoretical SNR computations and identify any outstanding
system issues.
This final approach (which uses a bandpass AX
converter, tuner, CIC and DDF filters) has a significant
advantage when compared to a parallel conversion
architecture. This is because it reduces the tuner's
complex multiplication function to that of a simple gating
function. This results in the removal of a significant
problem in implementing a digital telemetry receiver.
Two major limitations were identified with this
bandpass AX architecture. The first is the limitation in
79
output QSNR that is proportional to the NCO tuning
frequency divided by the overall decimation rate. The
second is the difficulty of operating the NCO at the input
signal sample rate.
Areas for further investigation and analysis that have
been identified are:
(1) Further validation of the QSNR limitation
imposed by the NCO frequency due to tuning.
(2) Performing a hardware allocation and
building a prototype.
Overall the bandpass AX architecture seemed to be the
best fit to the telemetry receiver application among the
AX architectures. It seems to have some advantages over a
standard parallel architecture as well.
80
7
References
[1] M. W. Hauser, "Principles of over sampling A/D conversion,"
Journal of Audio Engineering Society, Vol. 39, No. 1/2,
January/February 1991, pp. 326
[2] V. Friedman, D. M. Brinthaupt, D.P. Chen, T. W. Deppa, J. P.
Elward, E. M Fields, J. W. Scott, and T. R. Viswanathan, "A
dualchannel voiceband PCM codec using AX modulation
technique," IEEE Journal of SolidState Circuits, Vol. SC24,
April 1989, pp. 274280
[3] B. H. Leung, R. Neff, P. R. Gray, and R. W. Brodersen, "Area
efficient multichannel oversampled PCM voiceband coder, IEEE
Journal of SolidState Circuits, Vol. SC23. December 1988, pp.
13511357
[4] B. P. Brandt and B. A. Wooley, "A 50MHz multibit sigmadelta
modulator for 12b 2MHz A/D conversion," IEEE Journal of Solid
State Circuits, Vol. 26, No. 12, December 1991, pp. 17461756
[5] P. W. Wong and R. M. Gray, "Twostage sigmadelta modulation,
IEEE Transactions on Acoustics, Speech, and Signal Processing,
Vol. 38, No. 11, November 1990, pp. 19371952
[6] V. Friedman, "The structure of the limit cycles in sigma delta
modulation," IEEE Transactions on Communications, Vol. 36, No.
8, August 1988, pp. 972979
[7] R. Gray, "Spectral analysis of quantization noise in a single
loop sigmadelta modulator with dc inputs," IEEE Transactions
on Communications, Vol. 37, No. 6, June 1989, pp. 588599
[8] V. Friedman, "The structure of the limit cycles in sigma delta
modulation," IEEE Transactions on Communications, Vol. 36, No.
8, August 1988, pp. 972979
[9] R. M. Gray, W. Chou, and P. W. Wong, "Quantization noise in a
singleloop sigmadelta modulation with sinusoidal inputs,"
IEEE Transactions on Communications, Vol. 37, No. 9, September
1989, pp. 956968
[10] R. Gray, "Spectral analysis of quantization noise in a single
loop sigmadelta modulator with dc inputs", IEEE Transactions
on Communications, Vol. 37, No. 6, June 1989, pp. 588599
[11] A. V. Oppenheim and R. W. Schafer, DiscreteTime Signal
Processing, PrenticeHall, Englewood Cliffs, New Jersey, 1989
81
[12] R. M. Gray, W. Chou, and P. w. Wong, "Quantization noise in a
singleloop sigmadelta modulation with sinusoidal inputs,
IEEE Transactions on Communications, Vol. 37, No. 9, September
1989, pp. 956968
[13] K. Ogata, Modern Control Engineering, PrenticeHall, Englewood
Cliffs, New Jersey, 1990
[14] N. He, F. Kuhlmann, and A. Buzo, "Multiloop sigmadelta
quantization," IEEE Transactions on Information Theory, Vol.
38, No. 3, May 1992, pp. 10151028
[15] R. E. Ziemer, Principles of Communications, Systems,
Modulation, and Noise, Houghton Mifflin Co, Boston, 1985
[16] E. B. Hogenauer,"An economical class of digital filters for
decimation and interpolation," IEEE Transaactions on Acoustics,
Speech, and Signal Processing, Vol. ASSP29, No. 2, April 1981,
pp. 155162
[17] E. B. Hogenauer,"An economical class of digital filters for
decimation and interpolation,' IEEE Transaactions on Acoustics,
Speech, and Signal Processing, Vol. ASSP29, No. 2, April 1981,
pp. 155162
82

Full Text 
PAGE 1
THE APPLICATION OF DELTASIGMA CONVERSION TO TELEMETRY RECEPTION by David Walter Holsteen B.S., Louisiana State University, 1982 A thesis submitted to the Faculty of the Graduate School of the university of Colorado at Denver in partial fulfillment of the requirements for the degree of Master of Science Electrical Engineering 1993
PAGE 2
This thesis for the Master of Science degree by David Walter Holsteen has been approved for the Department of Electrical Engineering by Tarnal Bose Edward Bush Miloje Radenkovic 7J99.3 Date
PAGE 3
Holsteen, David Walter (M.S., Electrical Engineering) The Application of DeltaSigma Conversion to Telemetry Reception Thesis directed by Assistant Professor Tarnal Bose ABSTRACT Current technology has advanced to the point where the frequency of operation and density of microelectronics can support a digital implementation of a telemetry receiver. Such a receiver would provide increased flexibility in processing various types of telemetry. The problem to date has been the difficulty in implementing all the necessary functions in the digital domain with the capability of operating at 200 MHz and above. These functions include analog to digital conversion, the digital filtering, and the tuning. The deltasigma converter brings new possibilities to this application. Therefore, this research presents an analysis of the use of deltasigma conversion as the analog to digital conversion function in a telemetry receiver. A few deltasigma converters including those with single iii
PAGE 4
order, multiple order, and bandpass structures are investigated. Because of the unique characteristics of the bandpass structure, a system using it is able to get by with an oversampling ratio of 1.5 and the tuner can be replaced with an enable gate. These modifications together with a Combined Integrator Comb (CIC) decimating filter yields an architecture that is physically realizable. The signal to quantization noise ratio (QSNR) is derived for this architecture. The result indicates that this architecture has a QSNR limitation due to the tuning function. The architecture is .simulated on a computer and the results agree well with the theory. This abstract accurately represents the content of the candidate's thesis. I recommend its publication. Signed Tarnal Bose iv
PAGE 5
CONTENTS Chapter 1. Introduction. . . . . . . . . 1 1.1. oversampled Conversion . . . . . . 2 1. 2 Delta Sigma Conversion . . . . . . 4 2. A:L Converter Structure. . . . . . . 8 2 .1. Single Loop Structure. . . . . . . 9 2.2. Higher Order Loop Structures .................... 12 2 3 Bandpass Structures . . . . . . . 13 2. 4. Decoding Filter . . . . . . . . 14 3 Spectral Content . . . . . . . . 17 3.1. Limit Cycles .................................... 19 3.2. Signal to Noise Ratio ........................... 24 4. Stability . . . . . . . . . 29 4 .1. General Stability Condition.. . . . . 29 4.2. Overload Stability Condition .................... 36 5. Application to Telemetry Reception .............. 39 5. i. Downlink Characteristics . . . . . . 39 v
PAGE 6
5 2 Down! ink Requirements . . . . . . 41 5. 3. Single Order Architecture . . . . . 49 5.4. Cascaded Single Order Architecture .............. 53 5.5. Cascaded 1bit Tuner Architecture ............... 55 5.6. BandPass Architecture ........................... 57 5 7 simulation Approach . . . . . . . 6 5 5. 8. Simulation Results . . . . . . . 66 6. Conclusions . . . . . . . . . 7 8 7. References . . . . . . . . . 81 vi
PAGE 7
FIGURES Figure 1.1 Comparison of frequency spectra for a criticallysampled vs. oversampled signal with quantization noise ......................... 3 1.2 Generic loop structure of a &L converter ........ 5 2.1 Generic integrator representation of a AL converter. . . . . . . . . . 8 2. 2 &L noise shaping functions. . . . . . 11 2.3 Cascaded 1st order AL converter structure ....... 13 2.4 Bandpass noise spectrum shape ................... 14 2. 5 Binary quantizer . . . . . . . . 15 3 .1 AL noise model. . . . . . . . . 18 3.2 Spectral effects of limit cycles ................ 24 4 .1 First order &L Nyquist plot. . . . . . 33 4.2 Second order AL Nyquist plot .................... 34 4.3 Third order AL Nyquist plot ..................... 35 5.1 Input spectrum .................................. 40 5. 2 First order AL system. . . . . . . 50 vii
PAGE 8
5.3 cascaded system with 2bit tuning ............... 56 5. 4 BA!, system ...................................... 58 5.5 NCO resolution vs. QSNR for BA!, system .......... 59 5.6 ere frequency response, N = 2, M = 1, R = 62. 61 5.7 Simulated input spectrum ........................ 68 5.8 Simulated BA!, converter output spectrum ......... 69 5.9 Simulated tuner output spectrum ................. 70 5.10 Simulated ere output spectrum ................... 71 5.11 Simulated baseband output spectrum .............. 72 5.12 Simulated baseband output ....................... 73 5.13 Simulated tuner output spectrum with C/No = 44 dB. . . . . . 7 4 5.14 Simulated ere output spectrum with C/No = 44 dB. . . 7 5 5.15 Simulated ere output spectrum when the NCO uses 4bit arithmetic ........................... 76 viii
PAGE 9
1 Introduction For any given signal there is a frequency band that contains the information of interest. Typically, this signal must be processed in some manner to extract the information desired. For more flexibility in processing and for complex processing a digital data format is chosen. The most common approach to "capturing" the information in a digital form is to sample the signal at an instant in time and convert the sampled value to a set of binary digits using a nonlinear mapping performed by a "quantizer." This set is an encoded estimate of the value of the signal waveform at the sample time. Thus anNbit "word" represents the estimate of the waveform at the sample time. The signal must be sampled at or above the Nyquist rate to allow all the frequencies present in the information to be clearly represented in the estimate sequence. That is, it must be sampled at a rate that is at least twice the frequency of the highest frequency component of the signal. The signal must also be bandlimited so as to avoid the undesired frequency components 1
PAGE 10
above half the sample rate from folding back into the bandwidth of interest during the sampling process. This folding, called aliasing, is avoided if the components above the bandwidth of interest are attenuated sufficiently. This, however, requires a tradeoff between implementing an antialiasing filter (AA filter) with a sharp transition band or sampling at a higher rate and using a less complex AA filter. 1. 1. oversampled Conversion Bumping the sample rate up by a factor of R, called the oversampling ratio, allows the simplification of the AA filter for two reasons. One, the signal spectrum occupies less of the normalized frequency axis by a factor of R and so the signal may be naturally bandlimited to within that range. Two, since the actual bandwidth of interest is now limited to a range that is smaller by that factor of R, the AA filter doesn't have to be as sharp to do the job of rejecting aliasing frequencies. The filtering function is now split into two parts. The first part is the AA filter which is performed before the conversion to the digital domain. The rest of the filtering can be performed digitally on the sampled 2
PAGE 11
sequence to reduce the bandwidth of the signal to that of interest. This digital filtering is typically performed at the same time as the down sampling by R. ISy(w)l J \..... .. .... .. .. .... .. .... . TT/R t I I TT Fig. 1.1 Comparison of frequency spectra for a criticallysampled vs. oversampled signal with quantization noise. w If the quantizer is an ideal uniform staircase parallel A/D converter, it introduces a wide band quantization error if the input signal doesn't saturate the quantizer and is a "busy" signal above the LSB input level. Since the noise power introduced is not dependent on the sample rate but on the resolution of the quantizer and is uniformly spread over all the frequencies up to the sample rate, an oversampled conversion approach spreads the noise power over the wider bandwidth due to its higher sample 3
PAGE 12
rate. This means that the portion of the quantization noise spectrum above the signal can be removed during subsequent filtering and decimation thus improving the signal to quantization noise ratio (QSNR) This is illustrated in Figure 1.1. Using this approach, the QSNR is improved at the rate of 6 dB per octave of oversampling. Therefore, Oversampled Analog to Digital Conversion (OSADC) refers to any conversion approach that takes advantage of oversampling to reduce the QSNR. 1. 2 DeltaSigma Conversion Since the QSNR improvement is rather slow (oversampling by 1,000 yields about a 30 dB improvement) for the uniformly distributed quantization noise, deltasigma (All converters shape the quantization noise and push it away from the bandwidth of interest out into the higher frequencies that are subsequently filtered. Al conversion is characterized by the addition of a feedback loop to the converter to do this quantization noise shaping. A typical representation of the loop structure is shown in Figure 1.2. This approach derives its name from its similarity with the delta channel coding approach of information 4
PAGE 13
theory whose output was the difference between the current input and the previous output. u + X y Q J _, + e H(z) Fig. 1. 2 Generic loop structure of a AL converter. Conceptually, the added loop's purpose is to feedback an error signal from the output of the quantizer to correct for the noise introduced by the quantizer. The noise shaping effect of the conversion means an oversampled conversion system with a smaller oversampling ratio can provide a QSNR, and hence effective "bits" of resolution, equivalent to a straight oversampled converter. It is possible, using oversampling, for a binary quantizer to be used to convert a signal to a very high resolution digital word. Since a binary quantizer 5
PAGE 14
only has one step it cannot have a nonlinearity problem, therefore the single order converter has no theoretical limit for its resolution improvement [1). In addition the single order aL converter is relatively simple to implement. The aL converter, by virtue of its simplicity, trades off resolution of the quantizer with the ability to run at a faster rate and end up with more resolution after filtering and decimation. With the advent of faster VLSI circuits it has become a cost effective solution for some conversion requirements. However, the necessity to oversample a signal when it contains high frequency components of interest is the limiting factor in the application of this technology to date. Most applications have been limited to audio signals or to telephony or ISDN applications because of high volume and suitability to lower frequencies [2] [3]. For this reason only a few applications to signals in the megahertz range have been documented and have been limited to around 50 MHz or under [4). No applications of a bandpass converter have been found. The application of conversion to telemetry reception is different only in that its bandwidth has been 6
PAGE 15
translated up to the upper megahertz range. This can be accommodated, even used as an advantage as will be seen. 7
PAGE 16
2 0 Converter Structure The general structure of a converter depicted in Figure 1.2 can be also be formulated using an Lth order integrator in the feedforward path that integrates the difference between the input and the previous output. This equivalent structure is illustrated in Figure 2.1. This view emphasizes that the converter integrates the conversion errors of previous samples. This helps in understanding how the converter cannot provide anything but a crude, single bit estimate of the input. u + + Fig. 2.1 X Q .. + H(z) HOO Generic integrator representation of a AI converter. 8 y
PAGE 17
However, the correction to the conversion error is present in subsequent outputs from the converter. This means that there is a delay involved in generating a conversion estimate. Indeed, unlike the typical parallel converter whose output is a representation of the input at one sample time, the AL converter produces an estimate of the signal based on many input samples and quantizer outputs. Therefore, the filtering and decimation functions that follow the conversion loop are an integral part of the conversion process seeing that the output is "encoded" coming out of the quantizer and must be "decoded" by the filters in order to provide an accurate estimate of the input signal. That is why it may be helpful to consider this type of conversion a "serial" analog to digital conversion. 2. 1. Single Loop Structure The single order converter is the most basic form of AL converters and can be implemented as depicted in either Figure 1.2 or Figure 2.1 with the transfer function H(z) equal to z1 Its feedback transfer function is a simple delay element and the function Q(x) is a simple binary quantizer. The input to the converter is a continuous9
PAGE 18
time, continuousamplitude signal. The output of the converter represents the input waveform but has been sampled in time and quantized in amplitude. The quantization is obviously performed by the quantizer, Q, and the sampling in time is performed by the clock that gates the delay elements of the H(z) blocks. Since the single loop AL converter is trying to provide an estimate of the input in the form of the average of a stream of only two values, the output is always flipping between the two "rails" of the quantizer. But how can a signal that is only one of two values provide an estimate of its input that is arbitrarily accurate? The answer is that an "average" of a number of output samples must be viewed as the estimate of the input value. This averaging is performed by the decoding filters and, in essence, decodes the converter output. The decoding filter's purpose, seen from the frequency domain, is to remove higher frequency components from the converter's output spectrum. Figure 2.2 shows the shape of a first order converter's noise magnitude response. This curve illustrates the envelope of the quantization noise generated by the converter. 10
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0 0 20 Order :tst Order I:.ciop .......... . .. ... .... .................. ......... ................. . o I I o o I I o I I I 0 . 40 .............. .............. ; ............... .............. ; ............. 0 I I I 0 . . . .............. ................ ............................... ............. 60 I e I o I 0 I I I t . . 0 0.1 0.2 0.3 0.4 0.5 Nonnalized Frequency Fig. 2.2 noise shaping functions. This characteristic shape is the reason behind the utility of oversampling. As the oversampling ratio gets larger, the bandwidth of interest is compressed toward the origin as it takes up less and less of the total sampled spectrum. This compression means that less of the quantization noise is inband and the subsequent filtering of the quantization noise at frequencies above the bandwidth of interest results in the removal of most of the total noise power. So, getting an estimate of the input to the resolution necessary is a function of oversampling the signal enough so that the input spectrum is compressed into the notch of 11
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the noise spectrum then filtering the noise out above the bandwidth of interest. 2 0 2 0 Higher Order Loop Structures By changing the loop filter, the noise shaping can be modified to push the quantization noise more effectively away from the origin. This means that even less of the noise power is present at lower frequencies. The block diagram of the converter remains the same, but the feedback transfer function changes from a simple delay element to (1 z1)n 1. The resulting change in noise shape can be seen in Figure 2.2 for n = 2. This is termed a nth order multiple loop structure because the loop filter can be implemented by substituting a. cascade of n integrators for the integrator in Figure 2.1. Another way of getting a second order noise shaping response is by cascading two first order stages and including some stage combining functions. The structure of a cascaded first order converter is shown in Figure 2.3. The input to the second stage is the quantizer error signal from the first stage. The noise shaping performed is equivalent to the double order loop converter but allows 12
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the white noise assumption about the quantizer noise to be valid for a more general class of inputs. The quantizer error process has been found to be white for DC inputs and nearly white for sinusoidal inputs [5]. u q1 ... 1 .di z e1 q2 1 + .ar z + + y Fig .. 2. 3 Cascaded 1st order 4I converter structure. 2. 3. Bandpass Structures So far all the structures mentioned require that the signal of interest fall inside a noise shaping notch at the origin. However, it is possible to use a feedback transfer function that places the zeros in the noise transfer function at nonzero frequencies. For example if the feedback transfer function is a simple second order delay, 13
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the noise transfer function will have two notches. One notch will be at a frequency of zero and the other will be at half the sample frequency. If the feedback transfer function is z3 the noise transfer function will look like Figure 2.4. 40 ,....... 20 >Q '0 ......, '0 0 a a co < 20 40 0 0.1 0.2 0.3 0.4 0.5 Nonnalized Frequency Fig. 2.4 Bandpass noise spectrum shape. 2 0 4 0 Decoding Filter As was mentioned earlier, the filtering and decimation that follow the AL converter must be considered part of the conversion system. The signal of interest is encoded in the pulse stream output by the quantizer and must be recovered. This is most intuitive when a boxcar (moving 14
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average) filter is used to recover a simple signal from the output stream produced by a single order loop. If the input to the system of Figure 1.2 with a quantizer described by Figure 2.5 is +0.25 u, then the output of the qliantizer will settle to a steady state whose output samples repeat the pattern, +a/2, +a/2, +a/2, a/2 where fa/2 are the quantizer rail output values. Q(u) u N2 Fig. 2.5 Binary quantizer If the +a/2 rail and the A/2 rail are interpreted as a positive and negative floating point of one respectively, the output stream will be 1.0, 1.0, 1.0, 1.0. If a moving average filter with four taps and using the same number system processes the sequence, the result will be a 15
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constant value of 0.5 which corresponds to the input level because it is 3/4ths the distance from the negative rail value to the positive rail value. Now if integer arithmetic is used, let the rail and the rail be represented by a positive and a negative one in two's complement representation of a 4bit number system respectively. The output stream will be 1,1,1,1. If a moving average filter with four taps and using the same number system processes the sequence, the result will be a constant value of 1 + 1 + 1 1 = 2. This approach for boxcar filtering will yield a faithful conversion if the number system can accumulate all the taps with the same sign without overflow and no division is used. Notice that if a boxcar filter with 3 taps is used the resulting output stream would not be a constant but would be a stream of 3,1,1,1. This is due to the boxcar filter not attenuating the noise spectrum adequately enough. In the case with the 4 taps, the notch in the filter spectrum lined up with the spike in the output spectrum. To investigate this more a better understanding of the AL spectrum in order. 16
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3 Spectral Content One of the objectives of Al conversion is to spread the quantization noise across a wider bandwidth than the signal of interest and to shape the noise so that most of its energy falls outside of the bandwidth of the input signal and can be removed by the use of some form of filter. The quantizer introduced noise has a characteristic shape as illustrated previously. This shape is due to the transfer function acting on the noise injected by the quantizer. To see this the quantizer must be modeled as a noise source. The model used is shown in Figure 3.1. The converter output is then derived from: Y(z) = X(z)+N(z) ( 3 .1) X(z) = U(z) H(z)Y(z) + H(z)X(z) ( 3. 2) Combining these, the output is then just: Y(z) = U(z) + N(z)H(z)N(z) (3. 3) So if H(z) takes the form of: H(z)=l(lz8l (3. 4) 17
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the quantization noise transfer function takes the form of: Y(z) =(1zB )L N(z) ( 3. 5) n u + X ,. + y .. ... J + + + e H(z) Fig. 3.1 AI. noise model. The shape and position of the notches in a converter spectrum are controlled by number of integrators and the order of each integrator in the loop. The order of the loop L defines that L zeros create each notch in the spectrum thus defining the notch shape. The larger L is, the wider the notch becomes. The B delay elements in each integrator means that there will be B notches in the spectrum. This is the way a B&L converter provides a notch at a nonzero frequency. 18
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For a typical AL L order converter B is one. This places L zeros at z = 1 in the z domain and the frequency response of the noise transfer function is that of a high pass filter. Effectively, a high pass filter sits between the noise source and the output of the converter. For a typical BAL first order converter L is one. This places 1 zero at the B roots of z = 1 in the z domain and the frequency response of the noise transfer has B notches equally spaced between x and x with one at zero. 3. 1. Limit Cycles The preceding derivation makes no assumption about what the noise injected by the quantizer looks like. Its level and its spectral qualities do not affect how the shaping occurs. Normally the noise is assumed to be spectrally white which is a valid assumption only under certain conditions. Since the quantizer is a nonlinear element, the spectral distribution of the quantizer noise is dependent on the input signal. The number and energy content of the spikes in the spectrum is dependent on the "rationality" of the input signal [6]. For a DC input (or slowly changing 19
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AC that is effectively a DC for the period of the conversion) whose value can be represented as a rational function with a small denominator, the converter's output spectrum does not even approach a white spectrum but contains a few large spikes. The deltasigma converter, by nature, produces many higher frequency components during the conversion procedure. These components are the BohrFourier series solution to the nonlinear system [7]. The spacing of the frequencies in the response is dependent on the input amplitude and are not evenly spaced. However, during certain conditions these high frequency components coalesce into fewer, higher energy spikes that may not be attenuated completely. The existence of these tones in the output corresponds to an output sequence that contains a limit cycle pattern. For a limit cycle to exist in the output it is necessary that the sum of L input samples be a multiple of the quantizer output amplitude. Given a single order converter, the L consecutive difference equations describing the converter are: 20
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x( 1) x(O) = u( 1)Q[ x(O)] x(2) x(l) = u(2) Q[ x(l)] x( L) x( L 1) =u( L) Q[x(L 1)] ( 3. 6) Adding these L equations together and assuming that a limit cycle exists gives: L L x( L) x(O) = 0 =I u(i)I Q[x(i 1)] ( 3. 7) i=l i=l Since the left side of equation 3.7 is zero because of the limit cycle assumption, the value of the sum over u(i) must equal the sum over Q[x(i1)). The output of the quantizer, Q, is always one of two values and the sum is a multiple of the quantizer output amplitude meaning that the sum of u over a limit cycle period must be a multiple of the quantizer output levels. The difference of the two sums is a state variable of the integrator. Since x(L) = x(O) at the end of L samples and the integrator is again at zero, the converter is essentially starting over. This results in the output exhibiting a limit cycle. This occurs when u is a DC input. For the DC input, equation 3.7 can be rearranged and written as: U = r Q[ x(i)] = A = P i=O L B L ( 3. 8) 21
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where A and B are relatively prime integer factors of the input level u. In this case with binary quantizers, P can be viewed as the number of positive output samples in the limit cycle. So for DC inputs, if the input level can be expressed as a ratio of integers, the output is a limit cycle of length B with A positive output samples per limit cycle. The necessary conditions for limit cycles are valid for all quantizers in single loop converters. This is also shown by Friedman for double loop converters [8]. Something similar occurs for a sinusoidal input. If the input frequency is an integer submultiple of the sample frequency, equation 3.7 can be satisfied and the quantization noise power coalesces into the spectra of the input frequency and all its harmonics and half harmonics [9]. This may be expected because the output is a squarelike wave train. The difference is that the amplitudes of the spectra does not tail off the farther the harmonic is from the fundamental as it does in the spectrum of a square wave. Instead, the amplitude of the harmonics is distributed in a way that looks random. This effect is shown in Figure 3.2 for a limit cycle where the input signal is a sinusoid whose frequency is an irrational 22
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submultiple of the sample frequency. Also shown (with dots) is the case where the input signal has a frequency that is an integer submultiple of the sample frequency. The possibility of limit cycles occurring in the output of the converter causes problems in the decoding of the converter output because they change the structure of the output spectrum. The output spectrum is shown to be dependent on the input rationality for DC inputs such that the frequency separation of the spikes in the output spectrum is a function of the input amplitude divided by the full scale input amplitude of the quantizer [10]. The existence of the limit cycle, as mentioned before, allows the quantization noise power to be concentrated into fewer spectral components effectively raising the level of these frequencies. This is not desirable since they may represent unwanted harmonics introduced into the output by the nonlinear quantizer element in the converter. The "dots" in the Figure 3.2 represent the spectrum for the limit cycle case. As the length of the limit cycle grows, the energy in the limit cycle frequencies is spread over more frequencies effectively lowering the noise floor and improving the signal to noise ratio. 23
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60 50 40 30 "0 ::I .... a 20 gp ::E 10 0 3 2 0.3 Normalized Frequency 0.4 Fig. 3.2 Spectral effects of limit cycles. Signal to Noise Ratio 0.5 A common measure of the utility of a signal for use is its signal to noise ratio (SNR) This is a measure of the ratio of signal power to noise power and is usually expressed in decibels. The noise power can be from a number of sources. This research is concerned only with the input noise and quantizer noise sources. Input noise is significant in that it can be useful to the conversion process in that it provides a dither signal to the converter aiding the conversion by keeping the input "busy." However, noise at the input is not shaped but is 24
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treated as any other input and is converted. So the SNR at the output of the filter is affected by the carrier to noise ratio (C/No), but for a large C/No the QSNR dominates. A uniform quantizer provides an encoded estimate of its input value that has some error associated with the conversion due to finite register length. This error is frequently modeled as a noise process. This process approaches a white process if the following assumptions hold [11]: (1) The error sequence is a sample sequence of a stationary random process. (2) The error sequence is uncorrelated with the input sequence. (3) The random variables of the error process are uncorrelated. (4) The probability distribution of the error process is uniform over the range of the quantization error. Assumption (3) has been shown to be incorrect if the input is a constant or if it is a pure sinusoid [12]. However, the noise process is reasonably close to a white process, especially if the input remains busy. 25
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The noise process is a zero mean process if the quantizer is defined as shown in Figure 2.5. The probability distribution function is: 1 L1 L1 fN(P) = L1 ;2
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This needs to be evaluated with z = ejw. So Sy(ejw) for the various aL converters is: Sy(ejw) = 2 aN2(1cosw) ;single order =4 aN2(1cosw/ ;double order = 2 aN2(1cos3w) ;bandpass ( 3 14) In order to compute the SNR due to the quantization noise the frequency response of the decimation filter must be known. If the frequency response of the filter is H(ejw) then the QSNR is: 1 1C fsx( ejw) dw 2n QSNR = rc rc _}__ dw 2n rc ( 3 15) If the signal power is closely approximated by the power in the carrier, the filter is an ideal filter whose cutoff frequency corresponds to half of the final sample rate (no aliasing), and the spectra are symmetric about zero, the QSNR becomes: A2 nQSNR = w...... 2" Jsr(ejw)IH(ejw)l2 dw 0 27 (3.16)
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where A is the input signal amplitude of the carrier, we is the cutoff frequency of the filter and is equal to x/R. It is obvious that the QSNR increases as the oversampling rate increases due to a respective reduction in the cutoff frequency of the decimation filter. So the QSNR formulas for the various converters are: QSNR = 31&42 Am 2(wc sin we) single order 31tA2 Am2(3wc 4sinwc +!_sin2wc) 2 double order 31&42 bandpass (3 .17) If the parenthetic terms are approximated by a Taylor's series and recognizing We = 1/R, R = 2L, and A/Am = 1 (for full scale input amplitudes), then: 3 QSNR = = 9.03L+261 dB single order 1! 30R5 =4=15.05L5.12dB double order 1! 2R3 =2 =9.03L6.93dB bandpass 1! ( 3 18) Comparing this to an Lbit parallel converter the QSNR is: 322L QSNR = = 6.02L+1.76dB 2 (3 .19) 28
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4 0 Stability Since this type of converter contains feedback, the question of stability naturally arises. Under what conditions will a converter become unstable and hence useless? 4 0 1 0 General Stability Condition What are the characteristics of a converter when it is unexcited? For most linear systems this question can be answered with a Root Locus, Nyquist, or Bode analysis. Since the converter is a nonlinear system, these approaches cannot be applied, at least without modification. The approach taken here is a modification of the Nyquist analysis to handle systems containing nonlinear elements. The Nyquist Stability Theorem assumes that there is only one critical point in the GH plane that is used to determine stability. For nonlinear systems this assumption is modified to define a locus of critical points [13]. This locus of points is the image on the GH plane of the "describing function" of the nonlinear element. The 29
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describing function is defined as the complex ratio of the fundamental component of the output of the nonlinear element to its input. So if the locus of the describing function is "encircled" by the locus of GH(s) an instability condition exists. The Nyquist equation remains unchanged and is still z = N + P, where z and P are the number of zeros and poles outside the unit circle respectively, and N is the number of counterclockwise encirclements of a critical point. The describing function analysis approach effectively transforms the quantizer into another nonlinear element, a variable gain block. Once this is done, the transfer function of the output of the converter, q, with respect to the input, u, can be derived and the characteristic equation of the system can be analyzed for stability with the modification that the describing function locus is a set of critical points. So starting with a general AL converter as shown in Figure 1.2 and representing the quantizer with a gain block K yields: Y(z) = K X(z) X(z) = U(z) H(z)[Y(z) X(z)J 30 (4 .1) (4.2)
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Solving equation 4.2 for X{z) and plugging back into equation 4.1: Y(z) = K [U(z) H(z)Y(z)] 1H(z) Solving equation 4.3 for Y{z): Y(z) = K U(z) 1H(z) + KH(z) The characteristic equation is the denominator of equation 4.4 which can also be expressed as: where: 1 +KG(z) =0 G(z) = H(z) 1H(z) For a first order AL converter: then: H ( z) = 1 ( 1 z 1 ) = z 1 1 G1sd z) = 1 z(4.3) (4.4) { 4. 5) ( 4. 6) ( 4. 7) ( 4. 8) This system has z and P both equal to zero so N must be zero as well for stability. The plot of G1st and 1/K on the GH plane is shown in Figure 4.1. From this diagram it is obvious that for some value of K the system will be 31
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unstable because the two curves intersect. But is this a marginally stable operation point or an unstable point? A disturbance that moves the operating point to the right from the point of intersection along the 1/K locus describes an operating point with a larger value of K which corresponds to a smaller state variable value. However, any point to the right of the intersection is a point that has N = 1 indicating that the state variable will grow in amplitude while operating in this region. This will drive the operating point back to the left. Similarly, displacement to the left results in an operating point that has N = 0, so the amplitude of the state variable will tend to decay resulting in a movement back to the right. Therefore, the point of intersection is a stable operating point. Furthermore, at the point of intersection, G(z) = 0.5 + jO.O, which means z = ejw = 1 + jO which means that w = (2k + llx. If k = 0 is chosen, then w = x which corresponds to a frequency of oscillation at the operation point of half the sample frequency. So Nyquist analysis predicts a stable oscillation is sustained at a frequency of half of the sample rate. This is indeed what is seen to occur. 32
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4 .!!3 2 .i 0 j 2 4 2 1.5 1 0.5 0 0.5 1 Real Axis Fig. 4.1 First order Nyquist plot. For a second order AL converter: (4. 9) then: 2z1 G2nd(z) = 2 (z 1) (4.10) This system also has z and P both equal to zero so N must be zero as well for stability. The plot of G2nd and 1/K on the GH plane is shown in Figure 4.2. Just as in the first order case, the system has a stable operating point at the intersection of the two loci. Also the frequency of operation is half of the sample rate. 33
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then: 4 2 ............... .. ............ _,_._ __ ,_ 2 4 5 ................ ...... 4 3 2 Real Axis 1 0 Fig. 4.2 Second order aL Nyquist plot. For a third order AL converter: 2 G (z) = 3z 3z+l 3rd (z l)J 1 ( 4. 11) (4.12) Like the other systems this system has Z and P both equal to zero so N must be zero for stability. The plot of G3rd and 1/K on the GH plane is shown in Figure 4.3. Now there are three intersection points of the two loci. ,The leftmost intersection points both correspond to the operation points for the first and second order AL converter as the stability and frequency derivations follow 34
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the same arguments except that the operating point has N = 2 inside the "eye." The rightmost intersection is not a stable operating point and operation at this point will move left. 4 3 2 "' .. 1 .i 0 E 1 ... 2 3 4 5 4 Fig. 4.3 ........... __ .. ............ '" .... ...... __ __ .. 3 2 Real Axis 1 0 Third order aL Nyquist plot. 1 For a first order BAL converter with three notches: then: H( z) = 1( 1z J) = z J 1 Gbp(z)=3z 1 (4.13) ( 4. 14) Lastly, this system has also z and P both equal to zero so N must be zero stability. The plot of Gbp and 1/K on the GH plane is the same as the first order AL shown in 35
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Figure 4.1 and therefore the stability analysis is identical and it has a stable operating point and can function as a converter. 4 2. Overload Stability Condition The previous discussion on stability investigated the stability of the feedback loops for architectures given a zero input and found that these systems exhibit a stable oscillation point that corresponds to the desired response. But is the converter stable in a bounded input bounded output (BIBO) sense? A converter can be defined to be stable if its conversion error is always bounded for a bounded input. This type of stability is closely related to the concept of a converter operating in a nonoverload mode. Converter overload is defined as the condition where the quantizer error remains less than output step size of the quantizer. The condition to guarantee no overload operation is developed by He [14]. Starting with the difference equation of the system in Figure 1.2 and working in the sampled time domain: x(n) = y(n) e(n) = u(n) + H(z)e(n) e(n) (4.15) 36
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where H(z) is defined as in equation 3.4 with B = 1. Recognizing that H(z) can be written as a sum with binomial coefficients if (1 zl)L is expanded then: L x(n)=u(n)+ L(1/cf;e(nl) 1=0 If the quantizer is not overloaded up to the n1 sample, then using the identity L L(f) =2L l=O yields L .d lx(nJIS!u(nJI+ I (f ;le(n lJI5 b +(2L 1) l=O 2 (4.16) (4.17) ( 4 .18) So for an overload free quantizer at the nth sample, M and b must be chosen to satisfy + 12L) 2 where b is the bounding amplitude of the input to the ( 4. 19) converter (u), M is the number of levels the quantizer output (y) can take and is an even number, and L is the order of the converter. This is the relation to guarantee that the overload condition will not occur. For example, for a single order converter the condition is: 37
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(4.20) If this condition does not hold for an input signal the result is that the output will not provide a faithful estimate of the input signal. If the magnitude of the input signal exceeds A/2, the output will be driven to one of the quantizer rails and the quantizer error will tend toward infinity. This will continue until the input again ventures inside the valid input range. For oscillating signals with large amplitude the output will be pegged to a rail until the input swings through the valid input region at which point the output will swing to the other rail. 38
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5 Application to Telemetry Reception The goal of this section is to investigate the suitability of a AL converter as part of a telemetry receiver. The main functions necessary to implement a receiver are sampling, filtering, and tuning. As with any system, the modification of the A/D converter element may change the requirements of the other functions. Therefore, the following analysis will try to address all the above functions as part of the investigation as to the suitability of a AL converter to telemetry reception. 5. 1. Downlink Characteristics First of all, a digital telemetry receiver has as its input an intermediate frequency (IF) carrier modulated with baseband data and provides as output a sequence of sampled estimates of the baseband data. A major distinctive of IF telemetry is the high frequency of the input signal. Normally the frequency of the IF carrier is between 50 and 100 MHz. Although the carrier is at a high frequency, the information of interest has a much lower bandwidth, somewhere around 30 kHz. In 39
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addition, the input is bandlimited such that its bandwidth is 25 MHz around the carrier. The spectrum of the input signal looks something like Figure 5.1. The high input frequencies place a burden on the conversion system to handle sample rates of 200 MHz and above. ISu(f)l so dBm 124 dBm I I 25MHz Fig. 5.1 Input spectrum. Another characteristic of the telemetry stream is the carriertonoise ratio. This is a measure of the strength or utility of the telemetry signal at the input to the converter. The minimum C/No places a requirement on the conversion system to maintain a signal to noise ratio 40
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during processing that does not cause degradation of the C/No margin. 5. 2. Downlink Requirements The application of a deltasigma converter to this environment poses a few questions. "Can I sample fast enough?" "Can I filter fast enough?" "What kind of decoding filter should I choose?" The following analysis explores some answers to these and other questions. Since the signal into a AL converter is usually oversampled by a factor of R and the telemetry input rate is so high, the goal in applying the AL converter to a telemetry receiver is obviously going to be to minimize the oversampling rate. This concern will be highlightedby the first simple approach to the problem. The output of the AL converter contains the input information in an encoded form and lowpass filtering performs the decoding needed to recover that information. The ability of the AL converter to supply equivalent resolution as that of a parallel converter is dependent on the ability of the filtering to attenuate all of the high frequency components created by the quantizer to such an 41
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extent that they do not contribute significantly to the output. In addition, since the filtered signal will be decimated by a factor of R (normally large), the filter must be extremely narrow. This is a narrow filter because when it comes time to decimate the output of the converter, the filter must remove the high frequency components from fs/2R to f9/2 to prevent images of the noise from folding into the information of interest. Therefore, a narrow filter with a high attenuation rate is needed. This requires a high number of taps for a FIR filter implementation and the gain in SNR that can result from such a narrow filter, if it is needed, requires that the arithmetic used in the filter be able to represent that resolution at each stage of its processing. The result is that there is a lot of processing to perform to decode the converter output. Since the bandwidth of interest is relatively narrow compared to the carrier, once the signal is converted to a digital form it is desirable to reduce the bandwidth of the sampled data stream. First the information of interest must be translated from the frequency of the carrier to something much lower. This is usually implemented as a 42
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mixer which performs multiplication by a sinusoid or a complex exponential. This is another difficult function to implement at such a high sample rate. Parallel multipliers at this rate are not available or hard to come by depending on the sample rate. To ease the implementation of the NCO it would be desirable to limit the width of the NCO output, but this will affect the phase and frequency resolution of the NCO. The nature of the effect is that the NCO will not multiply by a pure exponential frequency as it translates the input spectrum. Rather, the NCO output is a complex sinusoid with an injected quantization noise. This may affect the performance of the conversion architecture. The tuning operation performed by the complex multiplication of these two inputs, each with quantization noise, results in a signal that can be described by the convolution of their respective frequency spectrums. The frequency spectrum of the single order AL quantizer output can be modeled as in equation 5.1. Ya(k) = :nMN [1e j!"'J ( 5 .1) 43
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The frequency spectrum of the NCO output can be modeled as in equation 5.2. ( ) ANco ) ANM YNco k = r;; u k kNco +. r;;; J v2 vJ2 N2"(5.2) In equations 5.1 and 5.2 n is the number of bits of NCO quantization, nq is the number of bits of quantization, is the converter input amplitude, is the full scale amplitude of the quantizer, ANco is the NCO amplitude, and is the full scale amplitude of the NCO. So, the convolution of the two spectrums (YQ, YNco) (5.3) [ANco S(k m k ) + ANM ]] ..J2 NCO 2..J3 N2ral 44
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1 A Yr(k) =I, N m=O v2 "1/2 (5. 4) The first of the four terms .is the signal frequency spectrum. The other terms constitute the noise that is generated in the system due to AL and NCO quantization. This frequency spectrum is filtered by subsequent DDF states. The QSNR of the tuned output at the output of the filter(s) is the ratio of the power in these two quantities when summed over frequencies where k is less than the ideal filter cutoff frequency (kcl. 45
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QSNR = Ps kc Pn Ps = ANcol2 Evaluating the sum and performing a Taylor's series expansion on the exponential term gives: ( 5. 5) ( 5. 6) where the approximation is valid if both k and kNco are much less than N. If all the amplitude values are normalized so that AoM ANM, ANco are all one and Ao is onehalf then: 46
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P = ]41t kckNco +l_kc I 2 3 2 n 2.../6 N2 2.../6 N3 ...f6 2" N 6 2" N 2 (5.7) Equation 5.7 indicates that there are three quantities that determine the QSNR for a single order Al converter with an nbit NCO tuner. They are the number of bits in the NCO arithmetic (n), the tuning frequency (kNco/N), and the filter cutoff frequency (kc/N) As expected, the greater the resolution of the NCO arithmetic, the larger the QSNR up to a limit imposed by either the value of kNco/N or kc/N. However, the first term in equation 5.7(b) is the limiting term for most Al converters. The receiver must provide the baseband processor a signal that has enough SNR to allow it to do its job. For a telemetry stream, the baseband processor requires 47
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somewhere in the range of 9 dB of SNR for a BPSK signal in order to get a bit error rate of 105 [15] The worst case input condition is when the input signal is weak because the carrier to noise density power ratio (C/No) is at its smallest value. If C/No is at 44 dB, and the noise density power (No) is at = 124 dBm/Hz, this places the carrier power (at 80 dB) which is small enough to be negligible when compared to the noise power present at the input to the converter. The composite power present at the converter's input is No BW where the bandwidth (BW) is, for example, 25 MHz. Pcomp=124dBm 25MHz=4 I013mW 25 I06Hz=50dBm. (5.8) Hz Hz So that the input to the converter will not saturate, an AGC circuit must control the input level so that the composite input power is down approximately 12 dB from the full scale input level of the converter. This corresponds to a setpoint at onefourth of full scale. This would put the full scale input level of the conversion system at 38 dBm. Therefore, the required dynamic range at the output of the A/D conversion system must be 38 (124) = 86 dB in order to resolve down to the noise. 48
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However, it only takes 38 (80 9) = 51 dB to have enough resolution for an SNR of about 9 dB. 50 3 0 Single Order Architecture The first architecture investigated was what seemed the simplest and most straightforward approach to implementing a digital receiver. This architecture consisted of the single order converter to sample the signal, a DDF decimating the output down to the Nyquist sampling rate, an NCO to perform the complex frequency translation, and a second DDF stage to reach the receiver output frequency. These functions were arranged as shown in Figure 5.2. 49
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.. aL .. DDF X DDF .. LO LO Fig. 5.2 First order system. In order to achieve the 86 dB of dynamic range needed to push the quantization noise floor down to the input noise floor, the oversampling ratio has to be 29 2 (600) using equation 3.18. Since the normal minimum sampling rate for a spectrum like this would be 200 MHz, this oversampling ratio would put the sample rate at 120 GHz! The DDF needs to filter and decimate the converter output by a factor of 600. The implementation of this filter is difficult at best due to the high sample rates. The simplest FIR filter would be M taps where all the tap weights are one. This is a boxcar or moving average filter which requires M1 bbit additions to implement. The frequency response of a boxcar filter is that of the 50
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rectangular window. The rectangular window has the following characteristics: wfirstnull =21ti(M+l) normalized frequencies Attenuation lst sitklobe = 15dB (5. 9) The aliasing components above half the new sample frequency must be removed before decimation. This means the first null of the filter must be at x I 600 which requires that M = 1,200 taps. The SNR at the output of the filter is affected by C/No, but for a large C/No the QSNR dominates. The QSNR for an ideal filter would be 86 dB using equation 3.18. Since this is better than the QSNR for any actual filter implementation, it represents the upper bound on the resolution needed in the arithmetic in the filter. Since 86 dB is about 1/20,000th, the arithmetic must provide better than 14 bits resolution to avoid raising the quantization noise level above that introduced by the binary quantizer. So 1,200 14bit adds are required to implement this DDF running at 120 GHz. The first DDF stage drops the sample rate down 200 MHz. To continue with the extraction of the baseband data, the bandwidth of the signal must be reduced. By translating the carrier frequency to zero this bandwidth 51
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reduction is accomplished. However, the mixer must perform 14 by 14bit multiplications and provide 14 bits out. The second DDF stage, like the first, filters the sequence so that the decimation down to baseband data rates can be performed. This is a decimation by 2,666. This means that an extremely narrow filter is necessary to remove any aliasing components. A boxcar filter this narrow would require 5,333 taps for a first null to be at the new Nyquist frequency. Although now the data rate is significantly slower than for the first DDF stage, the multiplications are now 14 bits by 14 bits and the large number of taps required means a huge processing job. An upper bound on the QSNR at the output of the second DDF stage can be derived based on the assumption that all of the quantization noise above a normalized frequency of referenced to the final sample rate is filtered out by the two DDF filters. Using equation 3.18, the QSNR is 189 dB based on the decimation by 1.6 million. This is, however, unachievable because of the sheer processing power required. Even in a nonrealtime environment the processing was too much to handle. The simulation performed for a single order AL converter could not handle that kind of decimation rate. 52
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This receiver implementation has a couple of implementation problems. The first is the high frequency of the converter. The 120 GHz operating frequency is high enough that there is no hardware available to implement the loop. The second problem is requiring the tuner to run at 200 MHz or faster. Since the tuner must be perform m by 14bit multiplications at this rate, this is a problem as far as actual implementation is concerned. 50 4 0 cascaded Single Order Architecture To try and ease the technical problems of implementing the single order Al converter in the first approach, a higher order Al converter can replace the single order converter shown in Figure 5.2. This slightly more complex converter can be implemented as a cascaded pair of first order loops. In order for the system to achieve the 86 dB of dynamic range that is needed, equation 3.18 indicates the oversampling ratio has to be 26 0 (66). This would put the sample rate at 13.2 GHz. Since the AL converter is a second order system, the output is a 2bit wide stream. 53
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The DDF needs to filter and decimate the converter output by a factor of 66. Similar to before, the boxcar filter would require 132 taps to filter out everything above x I 66. The filter, for this architecture, unfortunately does not have 1bit inputs as did the previous architecture. It has 2bit inputs which must be multiplied against each tap. The QSNR for an ideal filter would be 86 dB. Since this is better than the QSNR for any actual filter implementation again it represents the upper bound on the resolution needed in the arithmetic in the filter. Again, the arithmetic must provide better than 14 bits resolution to avoid raising the quantization noise level above that introduced by the binary quantizer. The hardware required to implement this filter would have 132 2 by 14bit multiplies and 131 14bit additions for each sample at 13.2 GHz. The tuner and the second filter stage would be identical to those of the first approach. An upper bound on the QSNR at the output of the second DDF stage can be derived as for the first architecture. Using equation 3.18, the QSNR is 257 dB based on the decimation by 176,000 and again the simulations run for the cascaded single order converter could not handle the 54
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number of samples needed to simulate this oversampled rate. This receiver implementation eases the sample rate difficulty of the first approach by dropping the rate to 12 GHz. However, the second problem of running the tuner at 200 MHz remains. 5. 5. Cascaded 1bit Tuner Architecture Now, if the system is modified by moving the tuner ahead of the 1st DDF stage, this would allow the tuner to be implemented as an on or off gate controlled by the quantizer output stream modulating the NCO output. This architecture is illustrated in Figure 5.3. 55
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.. X DDF .. J J LO LO Fig. 5.3 Cascaded system with 2bit tuning. The converter has the same characteristics as the cascaded architecture but now the tuner must run at the oversampled frequency. It gains an advantage, however, in that it only needs to perform 2 by mbit multiplications and provide m bits of output resolution. Similar to the first order analysis done earlier, the QSNRof this second order architecture will improve as the resolution of the NCO arithmetic improves up to a limit imposed either by the tuning frequency or the filter cutoff frequency. The DDF needs to decimate the converter output by a factor of 176,000 following the filtering operation to remove the high frequency components. If the filter used is a simple boxcar filter, number of taps needs would be 56
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352,000. This would give a QSNR at the output of 257 dB as before. The word width of the filter must be at least 42 bits to maintain the 257 dB QSNR. This kind of resolution, although available, is not necessary nor cost effective. Since the input sequence is m bits wide, the filter implementation is a 352,000 m by mbit multiplies and 352,000 mbit adds for each sample at the rate of 12 GHz. The upper bound on the QSNR is identical to the cascaded 1st order architecture. But now the technical problem is the filter. Since an Ntap FIR filter performs N multiplications for each sample output, and now the input is m bits wide, this approach has made the multiplier problem N times worse than the first approach. 5 6 BandPass Architecture There still remain three technical difficulties in trying to find a feasible approach to implementing a telemetry receiver with a converter. To try to find a combination that would be technically possible, a bandpass converter and a CIC DDF filter are coupled with the tuner. This new architecture is illustrated in Figure 5.4. 57
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.. X .. CIC DDF J J LO LO Fig. 5.4 system. The noise shaping performed by the BAL converter has notches at 0, and in the normalized frequency domain. Since the idea is to place the information of interest at the frequency of the notch, this would mean that the oversampling ratio should be 1.5. This would put the sample rate at 300 MHz. The output of the converter would be a 1bit wide stream at 300 MHz. The tuner must run at the sample rate of 300 MHz and provide a complex frequency translation of the BAL converter spectrum to zero. The advantage that it has, however, is the input is 1 bit wide. The tuner must perform m by 1bit multiplications and provide m bits out. Again, it is desirable that the convolution of the 58
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quantizer output spectrum with the NCO output spectrum during tuning not cause significant degradation of the tuned spectra. For the bandpass architecture the plot of equation 5.7 versus the number of bits of resolution in the NCO is shown in Figure 5.5. This plot indicates that the NCO should use better than 4bit arithmetic. 65.8 65.7 ij' 65.6 3 65.5 65.4 65.30 2 4 6 8 10 NCO Arithmetic Resolution (bits) Fig. 5.5 NCO resolution vs. QSNR for BaL system. Since the tuner precedes the DDF stages, the DDF's can decimate from the 300 MHz sample rate down to the 75 kHz sample rate for the baseband which is an overall decimation rate of 4,000. Furthermore, divide 4,000 into 62 for the first DDF stage and by 64 for the second stage. This 59
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should leave the signal baseband signal oversampled by 1.25 as in the previous architectures. The combined integratorcomb (CIC) filter is an economical implementation of a low pass filter for very narrow bandwidth requirements. It performs very well for a minimal "cost" if (1) the decimation rate is large, and (2) the output stream still remains highly oversampled. Since it is possible for both of these conditions to be met due to the massively oversampled signal coming out of the tuner, the CIC filter is a perfect fit for the system. The ere is a cascade of n ideal integrator stages followed by down sampling by a factor of R and then a cascade of n differentiator (comb) stages. The ere DDF filter has a frequency characteristic of sincn for small frequencies where the placement of the nulls in the frequency response is determined by the downsampling factor and the attenuation of the sidelobes is determined by the number of integrator/comb stages. Cascading more stages provides more rejection per sidelobe [16]. If the ere filter for this system is designed to have two stages (n) with a decimation rate (R) of 62, then its implementation would require two cascaded nbit accumulators followed with a downsampler by 62 and then 60
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two nbit differentiators. The filter has a power response of: (5.10) when referred to the input side of the downsampler and is illustrated in Figure 5.6. The notches in the frequency response fall at frequencies of 2xk/2 where k = {1,2,3,etc} when referred to the input side. The first notch is at a normalized frequency of 0.101 which is 2x/62. 20 0 20 iD 40 o ::J c 60 D' 0 :::l; 80 100 0.00 0.10 0.20 0.30 0.40 0.50 0.60 Normalized Frequency Fig. 5.6 CIC frequency response, N = 2, M = 1, R = 62. This means that upon downsampling, each of the notches in the frequency response of Figure 5.6 alias to a 61
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frequency of zero. Therefore a minute portion of the spectrum on either side of each notch aliases to each side of zero and adds into the signal. The aliasing from these bands is rejected by about 72 dB for the chosen parameters [17]. After decimation, the CIC output spectrum contains just the frequency range in which the main lobe of Figure 5.6 resides. The information of interest is found at CIC output sample rate frequencies of less than Frequencies above that, contain an aliased mess of filtered components. These need to be removed by another stage of filtering; This second stage of filtering can be implemented as a FIR filter since the sample rate has been reduced to 4.8 MHz. This DDF stage should reject the noise that was folded into the area of the first sidelobe of the CIC filter frequency response (frequencies of X/64 to x when referenced to the CIC output sample rate) It is possible with the sample rate this low to use a more complex FIR filter to get better rejection of the undesired components. If a Hamming window isused, the number of taps to place the first null at when referenced to the output frequency) is: 41t 1t =or M=256 M 64 62 ( 5.11)
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and provides a minimum of 53 dB of attenuation for the sidelobes. The upper bound on the QSNR for this architecture is computed the same way as the previous architectures. The difference being that the combined decimation rate is only 4,000. Using equation 3.18, the QSNR is found to be 101 dB. It is easy to see that this conversion system eases or eliminates the implementation problems found in applying the AL converter to a telemetry receiver. The sample rate is almost as low as a parallel converter and is within a range suitable for an ECL implementation. The problem of the tuner complex multiply is eliminated by the allowing the function to become a gating function. The problem of the number of taps required for a narrow enough DDF passband to get a good SNR is fixed by the use of a CIC filter whose characteristics lend themselves to the generation of very narrowband filters. And the problem of the FIR multiplication is also solved by the CIC filter implementation due to its simple architecture of ideal integrators, combs, and decimation. The most difficult block to implement for this approach is the generation of 63
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an nbit NCO stream at the fs/3 rate and the sample clock at a frequency of f5 The preceding analysis indicated that the bandpass architecture had promise as far as implementation is concerned. Simulation of the bandpass architecture was the next step in investigating this approach to telemetry The purpose of the simulation was to corroborate the SNR and stability predictions for the bandpass architecture. To accomplish this an end to end system simulation was chosen. But, since the decimation rate for the whole system is so large, a large number of sample periods had to be generated so that a few output samples would be computed at the baseband sample rate. The simulation was performed on a Sun Sparcstation 10 using the PV wave application. The host's memory limits were reached when more than 240,000 sample periods were specified for the input telemetry stream. This resulted in the ability to generate only about 60 output samples. 64
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5. 7. Simulation Approach To take advantage of the efficiency of array processing in PV Wave, the simulation was structured to compute all the input samples, then compute all of the AL converter output samples, etc. The telemetry input stream was a 100 MHz carrier that was DSBSC AM modulated by a 30,000 kHz sinusoid. This was combined with gaussian white noise such that the C/No was at a specified level. The input telemetry stream was converted by a first order bandpass AL converter whose notches were at zero and fs/3. To simulate as close as possible the analog portions of the system double precision arithmetic was used in the AL converter loop. The simulation used a binary quantizer in the AL converter loop. However, a simple binary quantizer produces a biased output because an identically zero input is possible and always produces a output. To avoid this bias the output selected from a uniformly distributed random sequence with outcomes of +A or A if the input was identically zero. 65
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The NCO and complex multiply functions of the tuner were implemented to simulate the quantization resulting from Nbit arithmetic to see the effect on the system of additional quantization noise. The first stage of the filtering used in the architecture is a CIC filter. The simulation of this filter was implemented as in equation 5.10. This approach referred all of the actual filtering action to the high sample rate side of the decimator. Follow1ng the filtering the signal was decimated by 62. The second stage of filtering was implemented by a library package of PV Wave that implemented a FIR filter with a desired impulse response. The desired filter response was 75 dB of rejection and a cutoff frequency at the new sample rate (0.005 with respect to the CIC output sample rate) 5 0 8 0 Simulation Results The results of the simulation fall into three categories, (1) the general behavior of the bandpass architecture, (2) the effect of the NCO quantization, and (3) the SNR at the baseband output. 66
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The first set of plots is arranged to provide a step by step view into how the input signal is transformed as it is processed by the bandpass architecture. The parameters used in generat.ing these plots were: carrier Frequency: 0.3333 of sample frequency Subcarrier Modulation AM Modulation Frequency 0.0001 of sample frequency Input Amplitude 0.5 of full scale input NCO resolution 16 bits The firS't plot shown in Figure 5.7 is the spectrum of the input to the converter. The main spike is actually the twin spectra of the DSBSC modulated carrier. The additional spectra are related to the way the carrier was generated and may be have not been further explained. 67
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Input Spectrum 100 50 m011 '0 0 .a ;: 0' c :z 50 Normalized Frequency Fig. 5.7 Simulated input spectrum. The plot in Figure 5.8 shows the output of the bandpass AI. converter illustrating two of the three notches shaped by the feedback loop. The carrier is placed directly in the notch frequency to allow the best possible noise rejection. The "wings" found on the top of the noise lobe around a frequency of 0.16 are due to the first order loop used in the converter. The noise spectrum is usually assumed to be white, but these wings illustrate that it is not a completely valid assumption in this case. 68
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Quantizer S ectrum 100 50 mIll "C 0 :I .... c 171 D ::=;; 50 Normalized Frequency Fig. 5.8 Simulated converter output spectrum. Figure 5.9 details the spectrum following the frequency translation performed by the tuner. Since the tuning performed a complex frequency. translation, the two sidebands of the modulated carrier now straddle the origin. The second image of the carrier is not shown. 69
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Tuned Qucntizer S ectrum 100 50 ........ m Cl) "0 0 .Z! ;: 01 0 :::;; 50 Normalized Frequency Fig. 5.9 Simulated tuner output spectrum. Following the tuner is the first stage filter. The frequency response of this filter was portrayed in Figure 5.6. Figure 5.10 shows the resulting spectrum following the filtering and decimation of the first stage. The frequency of the upper sideband is now apparent at around 0. 0001. 70
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50 m Gl "1:1 0 .3 ;: 17' 0 ::::1! 50 Normalized Frequency Fig. 5.10 Simulated ere output spectrum. The baseband spectrum and the baseband output are depicted in Figures 5.11 and 5.12 respectively. There is evident spreading in the spectrum of the baseband due to the large combined decimation rate. The baseband output is highly attenuated by the second stage filter because the filter specifications were over specified. It was asked perform a narrowband filtering function while keeping the number of taps to 100. These are conflicting requirements and the result is a filter that has considerable passband attenuation. This attenuation could be remedied by using a 71
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better filter (i.e. by increasing the number of taps, or by using an IIR topology, etc.). Baseband S ectrum 100 50 Iii' Q) "1:) 0 .3 c: 0"1 D 50 Fig. 5.11 Simulated baseband. output spectrum. All that aside, the bandpass architecture has extracted or demodulated the information present on the carrier and presented it at baseband. But what about.the performance of the converter given a noisy environment? That is to say, how does it respond to a signal with some amount of input noise? 72
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Baseband 0.06 0.04 0.02 I v Ill "0 0.00 0.. 1\ E < 0.02 v \ 0.04 0.06 0 20 40 60 Samples Fig. s .12 Simulated baseband output. Since the converter cannot distinguish between input signal and input noise, it treats all inputs as signals. This means if the input noise is larger than the quantization noise the QSNR is no longer the limit on the performance and its effects are noticed. The input noise starts "filling upu the notches. Figure 5.13 shows the tuner output spectrum and the beginning of the effects of the input noise can be seen. 73
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100 50 m 01) "0 0 :J .... c: en 0 ::t 50 Fig. 5.13 Tuned Qucntizer S ectrum Normalized Frequency Simulated tuner output spectrum with C/No = 44 dB. These effects are even more pronounced at the ere filter output because the spectrum is zoomed in on the area of the notch. The plot of this ere output spectrum is found in Figure 5.14. 74
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100 50 Iii' 3 Ql 't) 0 .a 'i: C" 0 ::E 50 0.002 Fig. 5.14 0.000 0.002 0.004 0.006 0.008 0.010 Normalized Frequency Simulated CIC output spectrum with C/No = 44 dB. Another source of noise that was considered earlier was the NCO quantization noise. Figure 5.15 is the spectrum of the CIC output when 4bit NCO arithmetic is used. The noise spikes come from the convolution of the NCO output which looks much more "squarish" and hence has significant harmonic content. These harmonics convolve with the carrier spike and produce the resulting "family" of carriers. 75
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co Ill "'0 .3 c: .,., 0 :::::E 100 50 0 50 0.002 Fig. 5.15 0.000 0.002 0.004 0.006 0.008 0.010 Normalized Frequency Simulated CIC output spectrum when the NCO uses 4bit arithmetic. Another result of the simulation is the comparison of the computed SNR to that which was measured from the simulation. The QSNR was computed from equation 5.7(b). Figure 5.5 indicates that this equation has one dominant term when the number of NCO bits exceeds approximately 5. The first term in equation 5.7(b) is the limiting term. It indicates that the converter is limited in its QSNR due to the frequency of the NCO. Plugging in the numbers for the bandpass architecture gives a QSNR of about 40 dB. This matches well with the QSNR numerically computed by the simulation. The simulation returned a QSNR of 43 dB at the 76
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output of the ere filter. The computed QSNR at baseband was significantly lower at 10 dB. This value seems to be too low due to the aforementioned second stage DDF concerns. 77
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6 Conclusions This thesis has attempted to determine the applicability of AL converters to the telemetry receiver function. Along the way the issue of stability of these conversion systems was addressed. First and second order AL converters were determined. to be, by their nature, marginally stable in that they. would all oscillate at a frequency of half the sample rate in a zero input condition. This was a characteristic that is necessary for them to function in the manner intended. Also investigated were the spectral characteristics of these types of converters. Here the result was that there are certain conditions for which the output stream exhibits a limit cycle. These conditions were (1) a DC input whose level can be represented as a rational number with a small denominator, and (2) a periodic input who.se period is a submultiple of the sample frequency. The main problem that this introduces is an elevation of the quantization noise floor. Also addressed was the QSNR for three of the converter architectures. Basic formulas were derived .for the QSNR assuming that the DDF functions following the 78
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converters implemented ideal filters with cutoff frequencies at 0.5 R. Finally, the issue of telemetry receiver implementation was studied. Four different receiver architectures that met the same set of requirements were proposed. They were evaluated based on how easily each one could be implemented. Through the first three architectures, five major implementation problems were identified that severely restricted the suitability of each of these approaches. The final architecture addressed four of these five problems and either eliminated or reduced the concern. This architecture was simulated to corroborate theoretical SNR computations and identify any outstanding system issues. This final approach (which uses a bandpass converter, tuner, CIC and DDF filters) has a significant advantage when compared to a parallel conversion architecture. This is because it reduces the tuner's complex multiplication function to that of a simple gating function. This results in the removal of a significant problem in implementing a digital telemetry receiver. Two major limitations were identified with this bandpass architecture. The first is the limitation in 79
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output QSNR that is proportional to the NCO tuning frequency divided by the overall decimation rate. The second is the difficulty of operating the NCO at the input signal sample rate. Areas for further investigation and analysis that have been identified are: (1) Further validation of the QSNR limitation imposed by the NCO frequency due to tuning. (2) Performing a hardware allocation and building a prototype. overall the bandpass architecture seemed to be the best fit to the telemetry receiver application among the architectures. It seems to have some advantages over a standard parallel architecture as well. 80
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7. References [1] M. W. Hauser, Principles of over sampling A/D conversion," Journal of Audio Engineering Society, Vol. 39, No. 1/2, January/February 1991, pp. 326 [2] V. Friedman, D. M. Brinthaupt, D.P. Chen, T. W. Deppa, J. P. Elward, E. M. Fields, J. W. Scott, and T. R. Viswanathan, A dualchannel voiceband PCM codec using AL modulation technique, IEEE Journal of SolidState Circuits, Vol. SC24, April 1989, pp. 274280 [3] B. H. Leung, R. Neff, P. R. Gray, and R. W. Brodersen, "Areaefficient multichannel oversampled PCM voiceband coder, IEEE Journal of SolidState Circuits, Vol. SC23. December 1988, pp. 13511357 [4] E. P. Brandt and E. A. Wooley, A 50MHz multibit sigmadelta modulator for 12b 2MHz A/D conversion, IEEE Journal of Solid State Circuits, Vol. 26, No. 12, December 1991, pp. 17461756 [5] P. w. Wong and R. M. Gray, Twostage sigmadelta modulation, IEEE Transactions on Acoustics, Speech, and Signal Processing, Vol. 38, No. 11, November 1990, pp. 19371952 [6] V. Friedman, The structure of the limit cycles in sigma delta modulation, IEEE Transactions on Communications, Vol. 36, No. 8, August 1988, .PP 972979 [7] R. Gray, spectral analysis of quantization noise in a singleloop sigmadelta modulator with de inputs, IEEE Transactions on Communications, Vol. 37, No. 6, June 1989, pp. 588599 [8] V. Friedman, The structure of the limit cycles in sigma delta modulation, IEEE Transactions on Communications, Vol. 36, No. 8, August 1988, pp. 972979 [9] R. M. Gray, W. Chou, and P. W. Wong, Quantization noise in a singleloop sigmadelta modulation with sinusoidal inputs, IEEE Transactions on Communications, Vol. 37, No. 9, September 1989, pp. 956968 [10] R. Gray, spectral analysis of quantization noise in a singleloop sigmadelta modulator with de inputs, IEEE Transactions on Communications, Vol. 37, No. 6, June 1989, pp. [11] A. V. Oppenheim and R. W. Schafer, DiscreteTime Signal Processing, PrenticeHall, Englewood Cliffs, New Jersey, 1989 81
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[12] R. M. Gray, W. Chou, and P. W. Wong, "Quantization noise in a singleloop sigmadelta modulation with sinusoidal inputs, IEEE Transactions on Communications, Vol. 37, No. 9, September 1989, pp. 956968 [13] K. Ogata, Modern Control Engineering, PrenticeHall, Englewood Cliffs, New Jersey, 1990 [14] N. He, F. Kuhlmann, and A. Buzo, "Multiloop sigmadelta quantization, IEEE Transactions on Information Vol. 38, No. 3, May 1992, pp. 10151028 [15] R. E. Ziemer, Principles of Communications, Systems, Modulation, and Noise, Houghton Mifflin Co, Boston, 1985 [16] E. B. Hogenauer,"An economical class of digital filters for decimation and interpolation, IEEE Transaactions on Acoustics, Speech, and Signal Processing, Vol. ASSP29, No. 2, April 1981, pp. 155162 [17] E. B. Hogenauer,"An economical class of digital filters for decimation and interpolation, IEEE Transaactions on Acoustics, Speech, and Signal Processing, Vol. ASSP29, No. 2, April 1981, pp. 155162 82

