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 Permanent Link:
 http://digital.auraria.edu/AA00007340/00001
Material Information
 Title:
 Suppressing circulating current in the modular multilevel converter using linetoline voltage correction modules
 Creator:
 Harave, Sudarshan Tejanag
 Place of Publication:
 Denver, CO
 Publisher:
 University of Colorado Denver
 Publication Date:
 2019
 Language:
 English
Thesis/Dissertation Information
 Degree:
 Master's ( Master of science)
 Degree Grantor:
 University of Colorado Denver
 Degree Divisions:
 College of Engineering and Applied Sciences, CU Denver
 Degree Disciplines:
 Engineering and applied science
 Committee Chair:
 MancillaDavid, Fernando
 Committee Members:
 Park, JaeDo
Dey, Satadru
Record Information
 Source Institution:
 University of Colorado Denver
 Holding Location:
 Auraria Library
 Rights Management:
 Copyright Sudarshan Tejanag Harave. Permission granted to University of Colorado Denver to digitize and display this item for nonprofit research and educational purposes. Any reuse of this item in excess of fair use or other copyright exemptions requires permission of the copyright holder.

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Full Text 
SUPPRESSING CIRCULATING CURRENT IN THE MODULAR MULTILEVEL
CONVERTER USING LINETOLINE VOLTAGE CORRECTION MODULES
by
SUDARSHAN TEJANAG HARAVE Bachelor of Science, PES Institute of Technology, 2016
A thesis submitted to the Faculty of the Graduate School of the University of Colorado in partial fulfillment of the requirements for the degree of Master of Science Engineering and Applied Science
2019
This thesis for the Master of Science degree by Sudarshan Tejanag Harave has been approved for the Engineering and Applied Science Program by
Fernando MancillaDavid, Advisor, Chair JaeDo Park Satadru Dey
Harave, Sudarshan Tejanag (M.S., Engineering and Applied Science)
Suppressing circulating current in the modular multilevel converter using linetoline voltage correction modules
Thesis directed by Associate Professor Fernando MancillaDavid
ABSTRACT
The minimization of circulating currents is a major technical challenge in the modular multilevel converter (MMC) topology. Circulating currents are an inherent property of the MMC that originate from the voltage difference between the phases. These currents have a great impact on the submodule (SM) capacitor voltage ripple, volt age/current stress on the power switching devices and the power losses. Therefore, minimization of circulating currents is imperative for the smooth operation of the MMC. In order to achieve this goal, this thesis proposes a modified MMC topology which makes use of additional linetoline connected modules termed as voltage correction modules. These modules compensate for the voltage difference between the phases of the MMC and suppress the circulating currents. This solution offers a decoupled control between the circulating currents and the power stage and is independent of the number of SMs used in the MMC. Mathematical modeling along with the control strategy is explained throughout this thesis and two test cases are conducted via detailed PSCAD/EMTDC simulations to validate this approach.
The form and content of this abstract are approved. I recommend its publication.
Approved: Fernando MancillaDavid
m
ACKNOWLEDGMENT
Firstly, I would like to thank my supervisor Dr. Fernando MancillaDavid for his continuous support on technical matters, inspiring discussions, motivation for the research and for sharing his experiences and knowledge of both the academic and nonacademic world. I deeply appreciate the many valuable hours that he has spent to edit my conference paper and chapters of this thesis.
I express my gratitude towards my friends Elector R. RoblesCampos and Bhanu S Babaiahgari for their advice and help with my research.
I greatly appreciate Dr. JaeDo Park and Dr. Satadru Dey for forming my thesis defense committee.
Finally, I would like to thank my family and friends back home in India as well as in the United States without whom I could not have been able to achieve this. They have always been by my side through the good and bad times and constantly supported me.
IV
DEDICATION
This thesis is dedicated to my family and friends who have always been a constant source of support and encouragement during the challenges of my whole graduate school life.
v
TABLE OF CONTENTS
Chapter
1. Introduction................................................................. 1
2. Objectives................................................................... 5
3. Relation between submodules and delink ripple............................... 6
3.1 Case 1: with delink capacitor........................................ 7
3.1.1 Test 1: 0.1 fiF delink capacitor .............................. 8
3.1.2 Test 2: 1 mF delink capacitor.................................. 8
3.1.3 Test 3: 1 F delink capacitor.................................. 10
3.2 Case 2: no delink capacitor......................................... 10
4. System modeling............................................................. 13
4.1 Modular multilevel converter......................................... 13
4.2 LChlter............................................................. 16
4.3 Voltage correction module ........................................... 17
5. Control methodology......................................................... 20
5.1 VSItwo layer controller............................................. 21
5.1.1 Phase locked loop ............................................. 22
5.1.2 Powertocurrent transformation................................ 23
5.1.3 Inner current control.......................................... 23
5.2 Leg energy controller ............................................... 25
5.2.1 Total leg energy control....................................... 26
5.2.2 Arm energy difference control.................................. 26
5.3 Modulator............................................................ 27
5.3.1 Phasedisposition pulse width modulation....................... 28
vi
5.3.2 Voltage balancing algorithm.................................... 29
5.4 Circulating current suppressing controller........................ 30
5.5 VCM controller ...................................................... 32
6. Design guidelines........................................................... 34
7. Simulation results.......................................................... 37
7.1 Case I: standard operating condition.............................. 37
7.2 Case II: unbalanced operating condition.............................. 42
7.2.1 First test: disturbances in phase a......................... 42
7.2.2 Second test: disturbances in phases a and b................. 45
7.2.3 Third test: disturbances in phases a,b and c................... 46
8. Conclusions................................................................. 51
9. Contributions............................................................... 52
10. Future work................................................................ 53
References.................................................................. 54
vii
LIST OF TABLES
Table
3.1 Relation between delink ripple and number of SMs.................... 11
4.1 Switching states of the SM............................................ 14
4.2 Switching states of the VCM .......................................... 17
6.1 MMC+VCM system parameters ........................................... 36
viii
LIST OF FIGURES
Figure
3.1 Conventional MMC........................................................ 6
3.2 MMC with different capacitors, (a): 0.1 nF capacitor; (b): 1 mF capacitor; (c): IF capacitor..................................................... 7
3.3 Simulation results for first test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages
of the arm inductors of the top and bottom arms........................ 9
3.4 Simulation results for second test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages
of the arm inductors of the top and bottom arms........................ 9
3.5 Simulation results for third test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages
of the arm inductors of the top and bottom arms........................ 10
3.6 Simulation results showing the relation between the number of SMs and
the dclink peaktopeak ripple without dclink capacitor.............. 12
4.1 Proposed MMC+VCM system .................................................. 13
4.2 Switching operation of the halfbridge SM................................. 14
4.3 Equivalent circuit of the MMC+VCM system............................... 18
5.1 Circuit schematic of the proposed MMC+VCM system displaying the variables utilized in the various controllers................................. 20
5.2 Overview of the overall control system.................................... 21
5.3 Schematic of the MMC+VCM VSI twolayer controller with PLL and
inner current control..................................................... 22
IX
5.4 Closedloop daxis and qaxis current controllers for the VSI twolayer
controller................................................................ 24
5.5 Schematic of leg energy controller with modulator.......................... 26
5.6 Schematic of total leg energy control...................................... 27
5.7 Schematic of arm energy difference control................................. 27
5.8 PDPWM modulation scheme for a 7 level MMC................................. 29
5.9 Flowchart of the voltage balancing algorithm for the upper arm............. 30
5.10 Circulating current suppressing controller................................ 32
5.11 VCM controller............................................................ 33
7.1 Threephase acgrid voltage for case 1..................................... 37
7.2 Simulation result showing the active power reference (Pref) and the grid
active power (Pgrid) for case 1...................................... 38
7.3 Simulation result showing the reactive power reference (Qref) and the grid
reactive power (Qgrid) for case 1..................................... 38
7.4 Circulating currents of all the three phases for case 1.................... 39
7.5 Capacitor voltages of the VCMs in between phases a and b for case I. . . 39
7.6 Capacitor voltages of the SMs in the top arm of phasea for case I. . . . 40
7.7 Capacitor voltages of the SMs for the first test..................... 41
7.8 Capacitor voltages of the VCMs for first test........................ 43
7.9 Circulating currents of all the three phases for first test................ 43
7.10 Capacitor voltages of the SMs for the second test.................... 44
7.11 Capacitor voltages of the VCMs for second test....................... 45
7.12 Circulating currents of all the three phases for second test.......... 46
7.13 Capacitor voltages of the SMs for the third test..................... 47
7.14 Capacitor voltages of the VCMs for third test........................ 48
7.15 Circulating currents of all the three phases for third test............... 48
7.16 Threephase acgrid voltage for case II................................... 49
x
7.17 Simulation result showing the active power reference (Pref) and the grid
active power (Pgrid) for case II............................................ 50
7.18 Simulation result showing the reactive power reference (Qref) and the grid
reactive power (Qgrid) for case II.......................................... 50
xi
1. Introduction
In this era of massive dependence on nonrenewable energy resources like coal, oil and natural gas, it is extremely important to look for alternative forms of energy to power the world as we might run out of these resources in the next 4050 years. Towards this end, there has been great strides in using renewable energy resources due to their various advantages. According to the Global Status Report released by REN2I, the estimated renewable energy share of global electricity production between 2014 and 2018 has increased from 22.1% [I] to 26.5% [2], One of the main reasons for integration of renewables to global energy network is not only to meet the incessantly increasing energy demand but also to improve the energy reliability, availability and protect the environment from adverse impact of fossil fuels [3]. This rise of renewable energy sources has led to requirements for higher power and more efficient converters.
Among the various power converters that are available in the market, multilevel converters are most favored for mediumhigh voltage/power applications [4], [5]. The use of multiple semiconductor devices allows for equal distribution of the voltage stress on each device, which in turn increases the maximum ratings of the converter while using cheaper and more efficient semiconductors. Moreover, the multilevel output increases the quality of the acvoltage whilst reducing the size and cost of the output filters. Some applications of multilevel converters are, large electrical machine drives, such as offshore wind turbines, highvoltage direct current (HVDC) transmission systems and flexible alternating current transmission systems (FACTS).
Recently, among the multilevel converter family, the modular multilevel converter (MMC) which was originally proposed in [6] has become one of the most promising topologies in the past decade for mediumhigh power energy conversion systems. They present an attractive alternative to the conventional twolevel voltage source converters because of their scalability, modularity, lower losses, redundancy and reduced voltage stress on devices [7]. One of the main features of the MMC is the
1
cascaded connection of a large number of identical modules termed as submodules (SMs) which can be configured as either halfbridge (HB) or fullbridge (FB) converters. The number of output voltage levels can be increased by increasing the number of SMs, thus improving the quality of the output acvoltage waveform. The voltage across each SM is significantly lower than that of the dclink voltage, therefore switches with lower voltage ratings can be used in MMCs. As a result of these aforementioned qualities, MMCs have been used in various applications like, machine drives [8], wind energy applications [9], solar photovoltaic applications [10] and HVDC transmission [11], MMCs are becoming highly popular especially in HVDC transmission where the first MMCVSCHVDC system was installed in San Francisco in 2010 [12]. Since then, numerous commercial projects have been commissioned, including the most powerful VSC link (INELFE), which connects France and Spain [13].
However, one of the main problems associated with the MMC is the presence of circulating currents which are inherent to the MMC topology and manifest from the variation in the capacitor voltages between the phases [14]. Various methods in the literature have been proposed to minimize these circulating currents like increasing the passive components such as the arm inductance and/or the resistance, or the capacitance of the SM [15], [16]. Increasing the arm resistance will reduce the efficiency of the converter, whereas increasing the arm inductance and/or SM capacitance will increase the monetary cost and the overall size of the converter. [17] proposes the use of a filter in each phase leg which is tuned in order to block the dominant (second) harmonic of the circulating current. Circulating currents have also been minimized by using cascaded control loops [18] with which the modulation function of each arm or module is modified [19]. With these control methodologies, a compensation term Mcir is added to the reference of the arm voltage which modifies the reference of each arm as shown below,
2
mip
min
1  Mcos(ut + 4>j)  J/f
2 "T" ^Wcirj
1 + Mcosjut + 0j)
o ^ cirj
(1.1)
(1.2)
The circulating currents can be minimized by adding a commonmode voltage term to the references of the arm voltages [20]. In [21] and [22], a proportionalresonant controller and a repetitive controller is used respectively to suppress the circulating currents. One of the main drawbacks from all the above methods is that they superimpose the voltage reference VjfV for the circulating currents directly into the modulation reference of the upper and lower arms. Due to this coupling connection, the upper and lower arm modulation reference waves become distorted which affects the quality of the output AC waveform [23]. Moreover, these control methodologies are complex in nature given the additional control loops.
In order to alleviate the aforementioned disadvantages, this thesis proposes the use of additional fullbridge VC Ms connected in a linetoline manner as shown in Fig. 4.1 to suppress the circulating currents. Although this solution uses extra hardware as opposed to the previous methods, it provides a decoupling between the power stage and the circulating currents of the MMC. As a result of this, a simplified control of the MMC with an independent control of the VCMs is achieved. Also, the operation of the VCM is unaffected by the number of modules present in the MMC arm. Furthermore, the magnitude of the converter output voltage can be increased or decreased by manipulating the voltages of the VCMs (explained in greater detail in section 4) without actually increasing the number of SMs.
The thesis is organized as follows; Chapter 2 talks about the objectives for the thesis, Chapter 3 discusses the relation between the number of SMs and the delink voltage ripple, Chapter 4 describes the system modeling of the power stage, Chapter 5 discusses about the various control methodologies involved, Chapter 6 explains the
3
design guidelines for the MMC+VCM, Chapter 7 shows detailed PSCAD/EMTDC computer simulations to validate the proposed MMC+VCM topology. The concluding remarks are described in Chapter 8, the contributions of this thesis are stated in Chapter 9 and finally the possible future works in Chapter 10 close the thesis.
4
2. Objectives
The minimization of circulating currents is a major technical challenge in the MMC topology. Circulating currents are an inherent property of the MMC that originate from the voltage difference between the phases and flow through the threephase units without affecting the acside. However, if not properly suppressed, these currents will affect the ripple of the SM capacitor voltage and damage the power semiconductor switches. The goal of the proposed thesis research is to suppress these circulating currents with the help of additional linetoline connected VCMs. Since the voltage sources, which are the sources of active power, are connected in parallel with the capacitor of every SM (which will be explained in detail in the upcoming chapters) and no energy source is connected onto the left hand side of the dc side, the delink of this MMC can be removed.
Therefore, the following objectives are set:
â€¢ Circulating current suppression using less number of VCMs by connecting them in a linetoline manner.
â€¢ Integrating voltage sources in the SMs to enable control on a permodule basis and making the system more reliable.
â€¢ Supply the power load demand under unbalanced conditions.
â€¢ Describe the relation between the number of SMs and the delink ripple.
5
3. Relation between submodules and dcâ€”link ripple
Figure 3.1: Conventional MMC
Fig. 3.1 shows the circuit diagram of a conventional threephase MMC, which consists of 3 legs and each leg is split into two arms namely, upper arm and lower arm. The arms are made up of N SMs which are halfbridge converters that comprise of a capacitor, two IGBT switches and two antiparallel diodes. The arms of the MMC are connected in series to a filter inductor La and an equivalent resistance Ra. La is present to limit the circulating currents and Ra accounts for the switching losses. This MMC topology aids in transferring the power generated by either a windmill (backtoback connection) or a solar pv panel into the acgrid.
Now, when the MMC is connected in a backtoback topology [24], the delink capacitor becomes very important for the proper functioning of the MMC in transferring the generated electrical power to the threephase acgrid. When this delink capacitor is regulated at a fixed voltage, all the power coming from the dc
6
side will be directly sent into the acgrid without any power flowing into the dclink capacitor. To achieve this goal, either a VÂ£c control or a Vdc control is implemented [25].
However, in this thesis there is no power source connected to the dcside of the MMC and since the voltage sources which are the sources of active power are integrated in the SMs of the MMC, there is no need for a dclink capacitor to be present in the circuit. One of the main functions of a capacitor is to smoothen the waveform by reducing the ripple. This chapter discusses the relation between the number of SMs and the dclink ripple. Two cases are presented which involve the simulations conducted with the presence of a capacitor and one without the capacitor.
3.1 Case 1: with dcâ€”link capacitor
After carefully studying the circuit with the presence of the dclink capacitor, it was found that the sole purpose of this capacitor is just to smoothen the waveform and reduce the ripple. In order to show this effect, three separate tests with three different capacitors were conducted. Fig. 3.2 shows the MMC system for three different capacitances. The MMC subsystem is the same as that of Fig. 4.1 without the VCMs.
(a) (b) (c)
Figure 3.2: MMC with different capacitors, (a): 0.1 p.F capacitor; (b): 1 mF capacitor; (c): 1 F capacitor
According to [18], the dclink voltage is given by (3.1),
7
rjo .
VTlc = Kj + n + 2 Larm^. (3.1)
where, V^fc is the calculated delink voltage, Kj and V\j are the voltages of the SMs in the top and bottom arms of phase j respectively and ^Taring) is the voltage across the arm inductor. Additionally, the delink voltage was also measured from the positive terminal to the negative terminal of the phaseleg in order to compare both sets of results. The measured delink voltage is termed as Vfceas. From (3.1) we can see that the voltage across the arm inductor also contributes in the formation of the delink ripple.
3.1.1 Test 1: 0.1 /uF dcâ€”link capacitor
In this case, a very small capacitance of 0.1 juF is chosen. Fig. 3.3 shows the simulation results for phase a with the delink capacitor for the first test. From Fig. 3.3a we can see that the measured and calculated delink voltages are similar with both switching at the rated switching frequency of 5000 Hz as can be verified from the zoomed in axis. Fig. 3.3b shows the voltage across the SMs of the top and bottom arms which are in multilevel format going from 0 to 600. It is important to note that the total phaseleg voltage ripple is the source of the delink voltage ripple [18]. As a result of this, the voltage across the inductor also plays a role in determining the ripple across the delink.
3.1.2 Test 2: 1 mF dcâ€”link capacitor
For the second test, the capacitance is increased to lmF. As can be seen from Fig. 3.4a, the ripple becomes very smooth when compared to the first test. The voltages of the SMs of the top and bottom arms still remain the same. However, the voltage across the inductor now changes a little bit to aid in the reduction of the delink ripple.
8
1/60 (s/div)
1/60 (s/div)
(a)
(b)
(c)
Figure 3.3: Simulation results for first test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages of the arm inductors of the top and bottom arms
Figure 3.4: Simulation results for second test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages of the arm inductors of the top and bottom arms
9
Figure 3.5: Simulation results for third test, (a): Measured and calculated dclink voltage; (b): voltages of the SMs of the top and bottom arms; (c): voltages of the arm inductors of the top and bottom arms
3.1.3 Test 3: 1 F dcâ€”link capacitor
For the third and final test, a very large capacitance of IF is chosen. From Fig. 3.5a, we can see that there is almost no ripple in the system. So, we can say that the capacitor kind of functions as a constant voltage source. The voltages of the SMs of the top and bottom arms and the inductor voltage are similar to the second test. From all the three tests, we can conclude that the dclink capacitance is solely present to reduce the ripple of the dclink.
3.2 Case 2: no dcâ€”link capacitor
Simulations were conducted to study the relation between the number of SMs and the dclink peaktopeak ripple with the absence of the capacitor. Table 3.1 shows the relation between the two and the impact this ripple has on the other parameters of the system.
From table 3.1 we can conclude that this dclink ripple has no effect on the
10
Table 3.1: Relation between delink ripple and number of SMs
Number of SMs Rc Ripple P (kW) Q (kVAr) Grid voltage
2 300 600 10 0 240
3 200 400 10 0 240
4 150 300 10 0 240
5 120 240 10 0 240
6 100 200 10 0 240
acside of the system as the active and reactive powers along with the grid voltage remain the same irrespective of the number of SMs present in the MMC.
From Fig. 3.6 we can see that as the number of SMs increases, the delink ripple reduces. By looking at the SM capacitor voltage and the delink ripple column of table 3.1, we can conclude that the delink ripple is twice the capacitor voltage of a SM. Towards this end, the following can be obtained,
dV = 2 (Vcj), (3.2)
where dV is the delink ripple and Vc; is the capacitor voltage of the ith SM which is given as follows,
RCi
N â€™
(3.3)
where V^rÂ®f is the delink reference voltage and N is the number of SMs. Finally, substituting the value of the capacitor voltage of the ith SM from (3.3) in (3.2), gives us the relation between the number of SMs and the delink ripple as follows,
dV
2
N
(3.4)
11
Voltage ripple Voltage ripple
1200
1200
600
dclink ripple, 2 SMs
a
8,600
Â£
 dclink ripple, 4 SMs
0
1200
a
&
8,600
c6
 dclink ripple, 5 SMs
Â£
0.5/60 (s/div) 1200
0.5/60 (s/div)
a, eoo
C8
I
dclink ripple, 6 SMs
8Â°(
60C 40C W *
.2 0.2002 0.2004
0.5/60 (s/div)
Figure 3.6: Simulation results showing the relation between the number of SMs and the dclink peaktopeak ripple without dclink capacitor.
12
4. System modeling
The circuit schematic of Fig. 4.1 illustrates the proposed MMC+VCM system. It includes an MMC acting as an inverter, a voltage source integrated in the SM of the MMC, a VCM for voltage compensation, an LChlter in series with a coupling transformer that connects to the threephase acgrid.
Figure 4.1: Proposed MMC+VCM system
4.1 Modular multilevel converter
Following the explanation given in chapter 3 and referring to table 4.1, the possible switching states of the HB SM can be understood. The two switches (SI and S2) in the SM operate in a complimentary manner, i.e. when SI is ON, S2 is OFF and vice versa. Based on the state of the two switches, the SM is either connected or bypassed from the arm inserting a voltage equal to Vc or 0 [6].
13
Table 4.1: Switching states of the SM
SM state SI S2 SM voltage
ON ON OFF W
OFF OFF ON 0
The operation of the SM is illustrated in Fig. 4.2. When the SM is not connected to the arm (OFF state) the capacitor voltage remains constant, while the capacitor voltage when the SM is connected (ON state) to the arm depends on the direction of the arm current. In other words, the capacitor starts to charge (discharge) when the arm current is positive (negative).
Figure 4.2: Switching operation of the halfbridge SM
The main idea of using multilevel converters is the synthesis of a sinusoidal voltage by utilizing several levels of voltages. In the case of an MMC, these voltage levels are obtained from the capacitance of every SM. At any given time, many SMs are switched on, so that the voltage at the converter output terminals equals the instantaneous value of the voltage to be synthesized [7]. In practice, the number of SMs will be quite large (200300 SMs) [12] and therefore will feature highquality waveform even
14
for a worstcase scenario.
The arm voltage of the MMC can be computed by considering the insertion index n(t). Let the total available arm voltage be equal to Vc (t), then the voltage inserted by the arm i for phase j = a, b,c is given by the following equation [26].
Vji = n{t) (vp{t)) . (4.1)
Let the arm currents be defined by /jp and /jn where p denotes positive (top) arm current and n denotes negative (bottom) arm current. According to Fig. 3.1 and [26] we have the following for the arm currents,
LjP = ^+/Cirj, (4.2)
^jn = â€œ + Ichp (4.3)
where 7cirj is the circulating current that circulates between the parallel phase legs. The equation for the circulating currents is as follows,
(4.4)
These circulating currents are generated by the voltage difference between the phases and flow through the three phase units without affecting the acside voltages and currents of the MMC [27]. However, if not properly suppressed these currents will affect the ripple of the capacitors of the SMs and increase the rms values of the arm currents which subsequently result in higher power converter losses.
Finally, the dcside and acside voltages of the MMC are computed by applying kirchhoffâ€™s voltage law (KYL) to Fig. 3.1,
15
Vdc â€” R& (Ijp + Ijn) + La
r]T r]T
dt
dt
+ ^jP + ^jn>
Vjn^
JP
Ra
+ y (^n ~ ^jp) + y
R& ( d/jn d I
jp
dt
dt
(4.5)
(4.6)
Assuming that the voltage in an arm is equally shared among the armâ€™s SMs, the energy stored in the arm i of phase j is given as follows,
v2
armji
a
(4.7)
where Carm is the equivalent arm capacitance which is given as Carm = C/n and Krmji is the total capacitor arm voltage when all the SMs are connected.
Therefore, the total energy stored in the leg of phase j and the energy difference between the arms can be calculated as shown below,
Wtotal, = Wjp + wy (4.8)
Whiff, = wjp  Wjn (4.9)
where WjP and Wjn are the total energy of the upper arm and lower arm respectively.
4.2 LCâ€”filter
LChlters are used to minimize the amount of current that is injected into the acgrid [28]. These filters achieve higher efficiency along with cost savings, given the overall weight and size reduction of the components. Good performance can be obtained in the range of power levels up to hundreds of kW, with the use of small values of inductance and capacitance.
The circuit schematic of the LCffiter model is shown in Fig. 4.1, where, Lf, Rf and Cf are the filter inductance, capacitance and damping resistance respectively.
16
4.3 Voltage correction module
When the arm voltages are operating at different operating points, there will be a voltage difference between the phases which will give rise to huge circulating currents. In order to alleviate this situation, VCMs are introduced in between phases as shown in Fig. 4.1. The VCMs considered in this application are FB modules which have three switching states (nvcme{ â€”1,0,1}) that are associated with the voltages injected by the modules. A carrier based PWM scheme is adopted to drive the VCMs. There are a total of four VCMs, one in between the phases in the top and bottom arms. The detailed switching states for the VCMs are shown in table 4.2.
Table 4.2: Switching states of the VCM
VCM state SI S2 S3 S4 VCM voltage
1 1 0 0 1 ^vcm
0 1 0 1 0 0
0 0 1 0 1 0
1 0 1 1 0 ^vcm
Fig. 4.3 shows the equivalent circuit of the MMC+VCM system for phases a and b. va, Vb, ia and ib are the converter output voltages and currents for phases a and b respectively. The upper and lower arm voltages are Vap,Vbp,Van and Vbn respectively. Lastly, the VCM capacitor voltages are given by fÂ°r the upper half and for the lower half. To examine the interdependence between the circulating currents and the capacitor voltages of the SMs, a continuous model of the MMC is used where it is possible to represent the arms as variable voltage sources with their values depending on the insertion index n{t). Following the explanation given in section 4.1 and applying KVL to the inner loop of Fig. 4.3, the arm currents, the VCM capacitor voltages and the continuous model of the MMC+VCM can be related as follows,
17
V
ab
u
vcm
Figure 4.3: Equivalent circuit of the MMC+VCM system.
ft (ft  ft) + ft (^f  = (ft  ftp) + (Â«b  ft + Kl'. (4.10)
ft (ft  An) + ft  (4^) = (vtâ€ž  v;â€ž) + (t.b + ft + ci, (4.ii)
Adding (4.10) and (4.11) gives the relationship between the circulating currents and the VCM capacitor voltages,
R& (Aira Airb)Vh
dlck:
dt
die irb dt
hbp + hbn
KP
, t/ T/abu , ' * an , ^ vrm \
t cab1 ^vcm
(4.12)
From (4.12), we can see that the circulating currents can be eliminated or significantly reduced by making the right hand side of (4.12) equal to zero which can be done by adding an equal and opposite voltage to the voltage difference between the phases.
Subtracting (4.11) from (4.10) and isolating one of the phases gives the converterâ€™s output voltage for phase j as follows,
18
(j T. (J T
dt dt
(4.13)
It is obvious from (4.13) that the converterâ€™s output voltage Vj can be increased by utilizing the voltage difference between the VCMs. However, for this application the VCMs are controlled in such a manner that the inserted voltages are equal in the respective arms making the voltage difference between the VCMs almost zero and thereby having a minor effect on the converterâ€™s output voltage.
19
Voltage correction module
Figure 5.1: Circuit schematic of the proposed MMC+VCM system displaying the variables utilized in the various controllers.
5. Control methodology
The control methodology for the MMC+VCM system as shown in Fig. 5.2 consists of five controllers. These controllers are utilized for the proper functioning of the MMC. The five controllers and their control objectives are: (z) a voltage source inverter (VSI) twolayer controller to transfer the generated power into the acgrid, (zz) a leg energy controller to control the energy stored in the capacitors of the SMs in order to ensure stable operation of the MMC, (iii) a modulator which consists of a phasedisposition pulse width modulation (PDPWM) that determines the SMs
that need to be switched on and a voltage balancing algorithm (VBA) to balance the
20
Power stage
Circulating current control
Figure 5.2: Overview of the overall control system
capacitor voltages of the SMs, (iv) a circulating current suppressing controller to suppress the inner circulating currents and (v) a VCM controller to compensate for the voltage difference during unbalance conditions. Both the circulating current suppressing controller and VCM controller are decoupled from the main power stage control and each of these controllers are described in detail in the following subsections.
5.1 VSIâ€”two layer controller
The widely utilized direct current control method that is well explained in [25] is adopted to verify the performance of the MMC+VCM. As a result of this, the
21
Figure 5.3: Schematic of the MMC+VCM VSI twolayer controller with PLL and inner current control.
outer power controller and the inner current controller are almost identical to the 2 level 3 phase VSI [29]. As seen in Fig. 5.3, this VSI twolayer controller is broken down into three blocks: (z) a phase locked loop (PLL) for acgrid synchronization, (zz) powertocurrent transformation and (zzz) the traditional current control in the directquadrature (dq) rotating reference frame to transfer the power generated into the acgrid at an arbitrary power factor.
5.1.1 Phase locked loop
Since the control of the power factor is a common goal for utility grid connected systems and requires the accurate phase information of the utility voltages, the phase tracking system is one of the most important parts of these systems [30]. The PLL technique has been used as a common way of recovering and synthesizing the phase and frequency information in electrical systems. The PLL computes the grid phase angle by sensing the grid voltage and projecting the corresponding space vector onto the dq axis. The q component is then forced to be equal to zero (uq = 0) with the help of a PI controller as shown in Fig. 5.3. By doing so, the dq axis will be rotating at the same speed as the grid angular frequency. This angle is then used to synchronize the dq reference frame for the inner current control. The complete procedure for the PLL control is explained in [25].
22
5.1.2 Powerâ€”toâ€”current transformation
The active power reference (Pref) and the reactive power reference (Qref) will be our control handles and are dependent on the load requirement. Prom these references, the dq currents can be computed accordingly:
a.t =
Qref = If
(5.1)
(5.2)
This equation is based on the assumption that the PLL is able to force vq to zero. MMC topologies offer independent control of reactive power. Depending on the grid conditions, by controlling the reactive power, the MMC can either generate a specified reactive power to the acgrid, or can regulate the power factor.
5.1.3 Inner current control
The three phase acside dynamics of the VSI can be described by the following dynamicphasor relation in the abc reference frame,
ch â€¢
lâ€˜m = ~Râ€˜h + vâ€˜  v>' (53)
where, Vj = ^rrij, Vj and q are the three phase ac voltages and currents at the VSIâ€™s ac terminal respectively, Ls and Rs are the equivalent inductance and resistance at the VSI side which are defined by the following equations,
Ls
Rs
Lf +
Ln
By applying the famous Park transformation, the acside dynamics of the VSI can be represented in the dq reference frame as follows,
23
daxis closedloop current control
rref
1d
ea
PI,;
U d
s Ls\Rs
Id
qaxis closedloop current control
I:
ref \
PI,;
Ur
la
s Ls\Rs
Figure 5.4: Closedloop daxis and qaxis current controllers for the VSI twolayer controller.
did
s dt diq
Ls dt
UjLsiq Rsid R Pi
djLsid Rsiq R hq Uq.
(5.4)
(5.5)
From (5.4) and (5.5) we can see that a q component is present in the daxis equation and vice versa, meaning there is no decoupling between the two and altering one of the parameters will affect the other one too. In order to achieve a decoupling between the two equations and design a current control loop for the VSI twolayer controller, we need to introduce two new control variables called Ud and uq as follows,
Ud djLsiq  Vd rq, (5.6)
uq = â€”ujLsi d + Vq â€” vq. (5.7)
By using (5.4) and (5.5) in (5.6) and (5.7), two decoupled, first order, singleinputsingleoutput (SISO) subsystems can be generated as shown below,
24
(5.8)
(5.9)
The current references from subsection 5.1.2 are then compared with their respective measurements as shown in Fig. 5.4. An error is generated which is driven to zero with the help of two decoupled Pibased compensators. The output signal from these compensators is then transformed into the abc reference frame using the inverse Park transformation and then fed into the modulator.
The transfer function of the Ph is given by the following equation,
One of the main reasons for employing hard limiters for the current control is to protect the VSI against over currents. As seen in Fig. 5.3 the current limiters prevent the circulation of large currents through the SMs, protecting the VSI against a short circuit current that might occur on the acside.
5.2 Leg energy controller
The energy stored in the capacitors of all the SMs needs to be controlled in a proper manner to ensure a stable operation of the MMC. To achieve this, I4rmji needs to be measured and the total energy stored {W^) in the arm i of phase j can be calculated based on (4.7). Fig. 5.5 shows the schematic of the leg energy controller which comprises of a total leg energy control and an arm energy difference control, and a modulator. The control scheme as depicted in Fig. 5.5 is based on the premise that Wji of one MMC leg can be regulated by controlling the dc component of the circulating current.
Ki
PI*(s) = Kpt + â€”i
(5.10)
25
w
ref
cm;
vc
J'k
signals
signals
Figure 5.5: Schematic of leg energy controller with modulator.
5.2.1 Total leg energy control
Since, the circulating current 7cirj is driven by VciTj and depends on the MMC arm inductance, a dc component of Vdrj will be sufficient for maintaining the total capacitor energy at the desired level. The total leg energy control shown in Fig. 5.6 regulates IFtotag to a desired reference energy level W^lal. which is typically the energy of the leg when the arm voltage equals the delink voltage. The measured energy is driven to its reference with the help of a Pibased compensator [26] given by,
Vw.,1, = (Hi,  HU*) (kp.o.,1, + . (5.11)
5.2.2 Arm energy difference control
The arm energy difference control as shown in Fig. 5.7 aims at cancelling the
energy difference by manipulating /cir.. From [26] we know that 7cirj cannot be directly
controlled but can be accessed through VciTy Another problem with this control is
that the phase of the control output must lead /cirj by argument of Za which is defined
as Za = Ra + La and argument of Vj. It is noteworthy to say that in steady state,
26
Figure 5.6: Schematic of total leg energy control.
fhdiffj contains considerable fundamental components. Therefore, at the output of the difference controller a lowpass filter is used to eliminate highfrequency components. To cancel the leg energy difference, the reference for the leg energy balance control should be 0. The measured leg energy control is then driven to its reference with the help of a Pibased compensator which is given as follows,
V5
diffj
 W'
diffj
Kpdiffj
Ki,
diffi
cos (arg(Vj) + arg(ZÂ»)).
(5.12)
Figure 5.7: Schematic of arm energy difference control.
5.3 Modulator
In the context of multilevel converters, various modulation strategies have been
proposed to generate gate signals for the converterâ€™s IGBTâ€™s, with each one having its
27
own advantages and disadvantages [31], [32], In order to synthesize an ac waveform voltage at the acside of the MMC, SMs must be consistently inserted into or bypassed from the system. Therefore, at any point of time, the number of SMs switched on in each arm (NjP>Tl) must be calculated. Since, the MMC is based on the cascade connection of multiple bidirectional SMs per leg, capacitor voltage balancing of the SMs becomes necessary for stable operation of the MMC [33]. With the sorting algorithm, all of the capacitor voltage measurements are sorted in either ascending or descending order of their voltage magnitudes, and each capacitor is selected to be either connected or bypassed [34]. The detailed explanation along with the flowchart is explained in the upcoming subsection.
5.3.1 Phasedisposition pulse width modulation
When the number of SMs and the voltage levels are low, the PDPWM technique is preferred. With PDPWM, the pulse pattern for the modules is generated by comparing the modulating signal of the arm voltage with N carrier waveforms with the same frequency and amplitude. By using this method, a lower harmonic distortion for the terminal voltage and current is obtained [35]. The number of SMs to be switched on is determined by the intersections of the modulating signal and the carrier waves. For the upper and lower arms of each leg, the modulating signals are computed as follows,
^jp â€” ^arm ^2 ^ ^otalj â€™ (5.13)
= + ^3 ~ ^otalj â€œ â€¢ (514)
where, Mjp and Mjn are the modulating signals for the upper and lower arms respectively. Fig. 5.8 shows the PDPWM modulation scheme for a 7 level MMC. It can be seen that for an n + 1 level MMC, n triangular carrier waves are used which feature
the same amplitude, frequency and phase. The number of SMs to be inserted in the
28
Figure 5.8: PDPWM modulation scheme for a 7 level MMC.
upper arm of phase j, NjP, is computed by comparing the modulating signal with each carrier waveform. The number of SMs to be inserted in the lower arm of the same phase is Njn = n â€” NjP.
5.3.2 Voltage balancing algorithm
Due to the topology of the MMC, the capacitor voltage balance issue becomes very important. VBA is used to balance the capacitor voltages of the SMs in each arm of the MMC [24], In this thesis work, the VBA is arm specific and aims to sort the arm capacitor voltages and decides which SMs to be switched on based on the capacitor values and the direction of the arm currents.
The VBA followed in this research is based on the algorithm stated in [36]. Fig. 5.9 shows the flowchart of the VBA. This process of sorting the SM capacitor voltages
consists of three steps. The first step is accepting the SM voltage measurements
29
JPn
Figure 5.9: Flowchart of the voltage balancing algorithm for the upper arm.
and the current measurements from the arms and finally the number of SMs that are switched on from the modulator. These measurements are then sorted into an ascending sequence matrix. In the final step, the SMs are inserted depending on the direction/polarity of the arm current. If the arm current is positive, the capacitor of the inserted SM will be charged and its voltage will increase. Hence, the voltage balancing algorithm will choose the SMs with the lowest voltage to reduce the voltage difference between them. Similarly, if the arm current is negative, the capacitor of the inserted SM will be discharged and its voltage will decrease. Therefore, the voltage balancing algorithm will choose the SMs with the highest voltage to reduce the voltage difference between them.
5.4 Circulating current suppressing controller
As stated in section 4.1, the circulating currents originate from the voltage difference between the phases and flow through the three phase units without affecting the acside voltages and currents of the MMC. Typically, the secondorder harmonic is the major component of the circulating currents and it is present in the form of negativesequence to the load currents with its frequency being twice the fundamental frequency [37], [14]. According to [38], the instantaneous power of the upper arm and lower arms of the MMC in phase a are calculated as follows,
30
(5.15)
Ppa â€” Upa(t') â– ipa(t')
(5.16)
By integrating (5.15) and (5.16) and adding both results, the ac component of the total energy stored in phase unit a is calculated as follows,
the phase unit voltage also contains a dc component and an ac component at double line frequency as shown in the following,
As the dc components of the three phase equivalent unit voltages are equal and as the ac components of the voltages lag each other by 120Â° at double line frequency, the circulating currents also at double line frequency are excited in the system. Hence, the circulating currents exist at twice the fundamental frequency. Additionally, [39]
it was found that the circulating currents as well as the arm currents consisted of a double frequency circulating current component in the absence of CCC.
Fig. 5.10 shows the complete control methodology for the suppression of circulating currents. The threephase circulating currents in negativesequence (acb) frame are transformed into the dq domain using 9 = 2ut as the reference angular position. These dq quantities are then compared against their respective references which are zero (since the circulating currents should be close to zero) and an error
From (5.17), we can see that a frequency of 2u0t shows up. As a result of this,
Upva â€” Upvadc + tfpuaac â€” Ufa + U2fsin (2.OJot + if)
(5.18)
conducted simulations with and without a circulating current controller (CCC) and
31
Â» PI
+
Figure 5.10: Circulating current suppressing controller.
is generated which is driven to zero with the help of Pibased compensators. Finally, the dq to acb transformation is used to generate voltage references Vdrj for each phaseleg which are divided equally and added to the voltage reference of the top and bottom VCMs [40].
5.5 VCM controller
A VCM is employed in between phases as shown in Fig. 4.1 which contributes in compensating for the voltage difference between phases and thereby improving the reliability of the MMC as well as in maintaining the circulating currents. This control is used to maintain the voltage of the VCM capacitors at their optimum value
â€¢ This reference is compared with the measured capacitor voltage of the individual VCM and the error is driven to zero with the help of a proportional controller. This proportional controller is enough to control the dc average of the VCM capacitor voltage as the capacitor value keeps changing continuously and the steady state error need not have to be zero according to [10]. This capacitor voltage increases or decreases based on the direction of the VCM current. Finally, the voltage references (^vcMref) are compared against carrier waveforms to generate switching signals for the VCMs. Fig. 5.11 shows the control scheme for the VCMs in between phases a and b.
32
abu VCM
ref
v;
ab1
VCM
ref
Figure 5.11: VCM controller.
33
6. Design guidelines
The MMC and acgrid side parameters are adopted from [36]. A delink reference value of 600 V is selected in order to ensure that the modulation index of the VSI twolayer controller is less than 0.95. The harmonic current content of the injected currents to the acgrid is directly related to the number of SMs in an arm [41]. As a result of this, a total of 6 SMs per arm along with a reduced sized LChlter is chosen so that the total harmonic distortion (THD) of the injected currents is less than 5%. The reference for the nominal SM voltage is given as follows [42],
vs?
N
(6.1)
From (6.1) we can say that the nominal SM voltage is 100 V.
As stated in section 4.1, we know that at any given point in time, only one of the IGBTs in a SM will be conducting while the other IGBT will be switched off. Therefore, each individual IGBT should have a voltage blocking capability of more than 100 V. The IGBT model FGH50N3, manufactured by Fairchild semiconductor is selected for this thesis. This IGBT has a voltage blocking capacity of 300 V and a maximum conducting current of 50 A. The resistance of this IGBT is 63 mQ and the total resistance of each converter arm considering the series connection of 6 SMs is 378 mQ. The sizing of the SM capacitor is based on the fact that the capacitor voltage ripple is below 5% and therefore the value chosen for the SM capacitor is 27.6 mF. Finally, the arm inductance La is selected as 15% of the systemâ€™s base inductance following the methodology explained in [43],
(%)2
ha = 0.15Zs,
where Zs is the base impedance of the system. Therefore, the arm inductance chosen
34
for this thesis is La = 1.9 mH. Lastly, the acgrid coupling transformer is rated at 24 kVA with a transformation ratio of 240/480 and a leakage inductance of 8%.
In practice, the MMC will usually feature around 200 levels and in such a scenario, there is no need of an LChlter at the ac terminals [44], However, when there are reduced number of levels, LChlters are required to minimize harmonic contents at the ac terminals. Since, the PDPWM technique is adopted in this work, the size of the LChlters is further reduced. This LChlter is designed to be compliant with the harmonic conditions as given in the IEEE 1576 standards. The LChlter inductance, capacitance and damping resistance for this work were chosen to be Lf = 4.9 mH, Cf = 6.9 nF and iff = 0.69 Q respectively.
The VCM switches should be able to block the average maximum value of the VCM capacitor voltage and this value depends on the voltage discrepancy between the phases. In general, the circulating currents can only be suppressed if the average voltage is sufficient to minimize this voltage discrepancy. Since the arm currents also how through the VCMs, the current rating of the VCM switches is the same as that of the SMs. The various parameters of the MMC+VCM considered in this simulation are listed in table 6.1.
35
Table 6.1: MMC+VCM system parameters
Item Parameter Symbol Value
MMC Number of SMs in one arm n 6
SM capacitance C 27.6 mF
VCM capacitance n v~/vcm 27.6 mF
VCM carrier frequency fci 1 kHz
Arm inductance La 1.9 mH
Arm equivalent resistance Ra 0.1 Q
SM switching frequency /sw 5 kHz
Nominal SM voltage Vc 100 V
SM series resistance ^sm 0.01 Q
Filter Filter inductance Lf 4.9 mH
Filter capacitance cf 6.6 jiF
Damping resistance Ri 0.69 Q
Coupling transformer Rated power S 24 kVA
Turns ratio vs/vp 240/480
Leakage inductance Lt 8%
AC grid Grid voltage 480 V
Grid frequency k 60 Hz
Short circuit power 3 MVA
X/R ratio 1.5
Load demand Active power p 10 kW
Reactive power Q 0 kVAr
36
7. Simulation results
In order to verify the performance of the proposed control methodology, a detailed model based on the timedomain simulation tool PSCAD/EMTDC is developed. The various parameters of the MMC+VCM system considered in this simulation are listed in Table 6.1. The active and reactive power references are chosen to be the control handles which depend on the load requirement. Two case studies are considered to evaluate the performance of the proposed MMC+VCM system in standard operating condition and unbalanced condition.
7.1 Case I: standard operating condition
In this case, all the SMs are operating at their nominal value of 100 V. The system performance is depicted in the various graphs that follow.
400
Sâ€™ 0
45
> I Â£
â€¢400
Fig. 7.1 shows the balanced threephase acgrid voltage at a frequency of 60 Hz.
37
Figure 7.2: Simulation result showing the active power reference (Pref) and the grid active power (Pglid) for case I.
From Fig. 7.2 we can see that the active power load demand increases from 5 kW to 10 kW at time equal to 2 seconds and decreases to 8 kW at 3 seconds. It can be observed that the MMC+VCM system is successfully able to meet the power load demand as the active power reference is being tracked successfully.
Â£
fH
1
Pb
Â£
â€¢ iâ€”i
+3
o
d
0
1
â€” Qref Qgrid
1 (s/div)
Figure 7.3: Simulation result showing the reactive power reference (Qref) and the grid reactive power (Qglid) for case I.
The reactive power demand is zero and as can be seen from Fig. 7.3, the measured reactive power is following the reference.
38
50
0
50
â€” ^cira ^ctib i r. circ
1
0.1 (s/div)
Figure 7.4: Circulating currents of all the three phases for case I.
The performance of the circulating current suppressing controller can be seen from Fig. 7.4 as the threephase circulating currents are suppressed.
25
SP 0
I
25
111 Â»A IA VlrvV Â»Â»Â»*Â«** tvm i irvwiMf T/abu "ab1 vcm
* vcm V
0.1 (s/div)
Figure 7.5: Capacitor voltages of the VCMs in between phases a and b for case I.
The main purpose of the VCM controller is to compensate for the voltage difference between the phases. So, when the voltages in the phases are balanced, we should expect the VCM capacitor voltages to be zero which can be verified from Fig. 7.5.
Fig. 7.6 shows the capacitor voltages of the SMs in the top arm of phasea. It can be seen from the figure that the SM voltage ripple is within the 5% range and the voltage balancing algorithm is able to balance the capacitor voltages.
39
Voltage (V)
102
100
Vc
r api
/WWWVWWVWWWWVWVWVWVWWWVWWWWWVWWVWWW
98
102
â€¢Vc
ap2
100 ^VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVV
98
102
.vc
ap3
100 /vwvwwywwvwwwwwwwwwyvwvwwwwwwwvwwvw
98
102
â– Vc
ap4
100 /wwwvwwwwvwwvwwwvyvwwwwwvwwwwwvwwwv
98
102
â– Vc
ap5
100 /wwwvwwwwwvwwwwwvvvwvwwvwvyvwwvwvvwwvv
98
102
vc
ap6
100 /VWVWVWWWWWWWWWVWVWWVWVWVWWWWWWWWWV
98
0.1 (s/div)
Figure 7.6: Capacitor voltages of the SMs in the top arm of phasea for case I.
40
Voltage (V) Voltage (V) Voltage (V)
Figure 7.7: Capacitor voltages of the SMs for the first test.
7.2 Case II: unbalanced operating condition
In the second case, three separate tests were conducted to verify the performance of the proposed system. In all the tests, for the first half of the simulation, the MMC+VCM system is operated with no VCMs to show the rise in circulating currents. For the second half of the simulation, the same SM voltage pattern is given to the system with the VCMs now turned on.
7.2.1 First test: disturbances in phase a
In the first test, only phase a undergoes voltage unbalance. Initially, all the SMs are operating at their nominal value of 100 V. At time equal to 0.1 seconds, the voltages of SMI and SM2 of the top arm and SM3 of the bottom arm of phase a are increased by 50% of its nominal value as shown in Fig. 7.7. All the other SMs are operating at 100 V.
When the first unbalance condition occurs, the VCMs are deactivated. There is no voltage compensation at this point. As a result of this, the VCM voltages are zero. Balanced conditions remain from time equal to 0.4 seconds to 0.6 seconds. For the second half of the simulation from 0.6 seconds, the same SM voltage pattern is given to the system, with the VCMs now activated. As you can see from Fig. 7.8, the VCMs are now compensating for the voltage difference between the phases. VCMs in between phases b and c have a negligible change because only phase a is undergoing voltage unbalance.
From Fig. 7.9 we can see that during the first half of the simulation, the circulating currents increase in magnitude as the VCMs are deactivated. However, when the VCMs are activated for the second half of the simulation with the same SM voltage pattern, they aid in suppressing the circulating currents which can be verified from
42
Current (A) Voltage (V) Voltage (V)
50
0
r vcm 1 /be1 vcm
50
0.1 (s/div)
Figure 7.8: Capacitor voltages of the VCMs for first test.
Figure 7.9: Circulating currents of all the three phases for first test.
43
Voltage (V) Voltage (V) Voltage (V)
Figure 7.10: Capacitor voltages of the SMs for the second test.
Fig. 7.9. Figs. 7.8 and 7.9 demonstrate the effectiveness of the circulating current suppressing controller and the VCM controller.
7.2.2 Second test: disturbances in phases a and b
In the second test, phases a and b both undergo voltage unbalance. Initially, all the SMs are operating at their nominal value of 100 V. At time equal to 0.1 seconds, the voltage of SMI of top arm of phase a is increased by 50% of its nominal value while the voltage of SM2 of the bottom arm of phase a is decreased by 25% of its nominal value. Similarly, SM4 of the bottom arm of phase b is also decreased by 25% of its nominal value as shown in Fig. 7.10. All the other SMs are operating at 100 V.
Figure 7.11: Capacitor voltages of the VCMs for second test.
45
Figure 7.12: Circulating currents of all the three phases for second test.
Similar to the first test, the VCMs are initially deactivated for the first unbalance condition and therefore their voltages are zero as can be verified from Fig. 7.11. The circulating currents also behave in a similar manner as in the first test which can be seen in Fig. 7.12.
7.2.3 Third test: disturbances in phases a,b and c
In the third test, phases a,b and c all undergo voltage unbalance. Initially, all the SMs are operating at their nominal value of 100 V. At time equal to 0.1 seconds, the voltage of SMI of top arm of phase a is increased by 50% of its nominal value while the voltages of SM2 of the bottom arm of phase b and SM4 of the top arm of phase c are both decreased by 25% of their nominal value as shown in Fig. 7.13. All the other SMs are operating at 100 V.
Similar to the first and second tests, the VCMs are initially deactivated for the first unbalance condition and therefore their voltages are zero as can be verified from Fig. 7.14. The circulating currents also behave in a similar manner as in the first and second tests which can be seen in Fig. 7.15.
46
Voltage (V) Voltage (V) Voltage (V)
Figure 7.13: Capacitor voltages of the SMs for the third test.
Current (A) Voltage (V) Voltage (V)
Figure 7.14: Capacitor voltages of the VCMs for third test.
Figure 7.15: Circulating currents of all the three phases for third test.
48
400
The acside quantities for all the three tests are not affected by the change in the SM voltage and the rise in magnitude of the circulating currents which can be verified from Fig. 7.16. The power load demand is the same as in case I. From Figs. 7.17 and 7.18, we can see that the MMC+VCM system is able to supply the necessary load demand even under the unbalanced condition. This is possible due to the distributed arrangement of the voltage sources inside the SMs.
49
Figure 7.17: Simulation result showing the active power reference (Pref) and the grid active power (Pglid) for case II.
Si
Â£
cl
Ph
I
PLi
l>
â€¢ pH
O
Ph
0
1
â€” Qref Qgrid
1 (s/div)
Figure 7.18: Simulation result showing the reactive power reference (Qref) and the grid reactive power (Qglid) for case II.
50
8. Conclusions
In this thesis a modular multilevel converter with voltage correction modules was proposed to meet the load demand under unbalanced conditions as well as suppress the circulating currents. Two case studies were considered to test the proposed topology. The control methodology involving various controllers was explained. The proposed system was validated via detailed PSCAD/EMTDC computer simulations for the load demand. The circulating currents were successfully suppressed with the help of the circulating current suppressing controller and the VCMs were able to compensate for the voltage difference under unbalanced conditions. Simulation results demonstrated the effectiveness of the proposed controllers in meeting the load demand under unbalanced conditions.
51
9. Contributions
The contributions of this thesis is as follows:
â€¢ An MMC with less number of VCMs is proposed to suppress the circulating currents.
â€¢ The power demand is met because of the distributed arrangement of the SMs which makes the MMC more reliable.
â€¢ The PDPWM technique is implemented to inject the power into the threephase acgrid which also allowed for a size reduction of the LChlter.
â€¢ The control schemes and models were validated via detailed PSCAD/EMTDC computer simulations which also demonstrated the effectiveness of the proposed controllers in meeting the load demand.
52
10. Future work
The proposed methodology opens the doors for possible future works. For instance, a systematic approach in designing and sizing of the VCM components involving the current rating of the switches and sizing the VCM capacitance as the variation in the VCM capacitor voltage depends on this capacitance. The reliability of the MMC can also be improved by adding redundant VCMs. In the case of a faulty VCM, this redundant VCM can continue to operate without any interruption until the faulty VCM is replaced in the next scheduled maintenance. A hardware prototype can also be implemented as a possible future work.
53
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SUPPRESSINGCIRCULATINGCURRENTINTHEMODULARMULTILEVEL CONVERTERUSINGLINE{TO{LINEVOLTAGECORRECTIONMODULES by SUDARSHANTEJANAGHARAVE BachelorofScience,PESInstituteofTechnology,2016 Athesissubmittedtothe FacultyoftheGraduateSchoolofthe UniversityofColoradoinpartialfulllment oftherequirementsforthedegreeof MasterofScience EngineeringandAppliedScience 2019
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ThisthesisfortheMasterofSciencedegreeby SudarshanTejanagHarave hasbeenapprovedforthe EngineeringandAppliedScienceProgram by FernandoMancilla{David,Advisor,Chair Jae{DoPark SatadruDey July30,2019 ii
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Harave,SudarshanTejanagM.S.,EngineeringandAppliedScience Suppressingcirculatingcurrentinthemodularmultilevelconverterusingline{to{line voltagecorrectionmodules ThesisdirectedbyAssociateProfessorFernandoMancilla{David ABSTRACT Theminimizationofcirculatingcurrentsisamajortechnicalchallengeinthe modularmultilevelconverterMMCtopology.Circulatingcurrentsareaninherent propertyoftheMMCthatoriginatefromthevoltagedierencebetweenthephases. ThesecurrentshaveagreatimpactonthesubmoduleSMcapacitorvoltageripple, voltage/currentstressonthepowerswitchingdevicesandthepowerlosses.Therefore,minimizationofcirculatingcurrentsisimperativeforthesmoothoperationof theMMC.Inordertoachievethisgoal,thisthesisproposesamodiedMMCtopologywhichmakesuseofadditionalline{to{lineconnectedmodulestermedasvoltage correctionmodules.Thesemodulescompensateforthevoltagedierencebetween thephasesoftheMMCandsuppressthecirculatingcurrents.Thissolutionoers adecoupledcontrolbetweenthecirculatingcurrentsandthepowerstageandisindependentofthenumberofSMsusedintheMMC.Mathematicalmodelingalong withthecontrolstrategyisexplainedthroughoutthisthesisandtwotestcasesare conductedviadetailedPSCAD/EMTDCsimulationstovalidatethisapproach. Theformandcontentofthisabstractareapproved.Irecommenditspublication. Approved:FernandoMancilla{David iii
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ACKNOWLEDGMENT Firstly,IwouldliketothankmysupervisorDr.FernandoMancilla{Davidfor hiscontinuoussupportontechnicalmatters,inspiringdiscussions,motivationforthe researchandforsharinghisexperiencesandknowledgeofboththeacademicand non{academicworld.Ideeplyappreciatethemanyvaluablehoursthathehasspent toeditmyconferencepaperandchaptersofthisthesis. IexpressmygratitudetowardsmyfriendsHectorR.Robles{CamposandBhanu SBabaiahgarifortheiradviceandhelpwithmyresearch. IgreatlyappreciateDr.Jae{DoParkandDr.SatadruDeyforformingmythesis defensecommittee. Finally,IwouldliketothankmyfamilyandfriendsbackhomeinIndiaaswell asintheUnitedStateswithoutwhomIcouldnothavebeenabletoachievethis. Theyhavealwaysbeenbymysidethroughthegoodandbadtimesandconstantly supportedme. iv
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DEDICATION Thisthesisisdedicatedtomyfamilyandfriendswhohavealwaysbeenaconstant sourceofsupportandencouragementduringthechallengesofmywholegraduate schoollife. v
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TABLEOFCONTENTS Chapter 1.Introduction...................................1 2.Objectives....................................5 3.Relationbetweensubmodulesanddc{linkripple...............6 3.1Case1:withdc{linkcapacitor.....................7 3.1.1Test1:0.1 Fdc{linkcapacitor................8 3.1.2Test2:1mFdc{linkcapacitor.................8 3.1.3Test3:1Fdc{linkcapacitor..................10 3.2Case2:nodc{linkcapacitor......................10 4.Systemmodeling................................13 4.1Modularmultilevelconverter......................13 4.2LC{lter.................................16 4.3Voltagecorrectionmodule.......................17 5.Controlmethodology..............................20 5.1VSI{twolayercontroller.........................21 5.1.1Phaselockedloop........................22 5.1.2Power{to{currenttransformation................23 5.1.3Innercurrentcontrol.......................23 5.2Legenergycontroller..........................25 5.2.1Totallegenergycontrol.....................26 5.2.2Armenergydierencecontrol..................26 5.3Modulator................................27 5.3.1Phasedispositionpulsewidthmodulation...........28 vi
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5.3.2Voltagebalancingalgorithm...................29 5.4Circulatingcurrentsuppressingcontroller...............30 5.5VCMcontroller.............................32 6.Designguidelines................................34 7.Simulationresults................................37 7.1CaseI:standardoperatingcondition..................37 7.2CaseII:unbalancedoperatingcondition................42 7.2.1Firsttest:disturbancesinphasea...............42 7.2.2Secondtest:disturbancesinphasesaandb..........45 7.2.3Thirdtest:disturbancesinphasesa,bandc..........46 8.Conclusions...................................51 9.Contributions..................................52 10.Futurework...................................53 References ......................................54 vii
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LISTOFTABLES Table 3.1Relationbetweendc{linkrippleandnumberofSMs............11 4.1SwitchingstatesoftheSM..........................14 4.2SwitchingstatesoftheVCM........................17 6.1MMC+VCMsystemparameters......................36 viii
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LISTOFFIGURES Figure 3.1ConventionalMMC..............................6 3.2MMCwithdierentcapacitors.a:0.1 Fcapacitor;b:1mFcapacitor;c:1Fcapacitor............................7 3.3Simulationresultsforrsttest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltages ofthearminductorsofthetopandbottomarms.............9 3.4Simulationresultsforsecondtest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltages ofthearminductorsofthetopandbottomarms.............9 3.5Simulationresultsforthirdtest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltages ofthearminductorsofthetopandbottomarms.............10 3.6SimulationresultsshowingtherelationbetweenthenumberofSMsand thedc{linkpeak{to{peakripplewithoutdc{linkcapacitor.........12 4.1ProposedMMC+VCMsystem.......................13 4.2SwitchingoperationofthehalfbridgeSM.................14 4.3EquivalentcircuitoftheMMC+VCMsystem................18 5.1CircuitschematicoftheproposedMMC+VCMsystemdisplayingthevariablesutilizedinthevariouscontrollers....................20 5.2Overviewoftheoverallcontrolsystem...................21 5.3SchematicoftheMMC+VCMVSItwo{layercontrollerwithPLLand innercurrentcontrol..............................22 ix
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5.4Closed{loopd{axisandq{axiscurrentcontrollersfortheVSItwo{layer controller....................................24 5.5Schematicoflegenergycontrollerwithmodulator.............26 5.6Schematicoftotallegenergycontrol.....................27 5.7Schematicofarmenergydierencecontrol.................27 5.8PD{PWMmodulationschemefora7levelMMC..............29 5.9Flowchartofthevoltagebalancingalgorithmfortheupperarm......30 5.10Circulatingcurrentsuppressingcontroller..................32 5.11VCMcontroller................................33 7.1Three{phaseac{gridvoltageforcaseI....................37 7.2Simulationresultshowingtheactivepowerreference P ref andthegrid activepower P grid forcaseI.........................38 7.3Simulationresultshowingthereactivepowerreference Q ref andthegrid reactivepower Q grid forcaseI........................38 7.4CirculatingcurrentsofallthethreephasesforcaseI............39 7.5CapacitorvoltagesoftheVCMsinbetweenphasesaandbforcaseI...39 7.6CapacitorvoltagesoftheSMsinthetoparmofphase{aforcaseI....40 7.7CapacitorvoltagesoftheSMsforthersttest...............41 7.8CapacitorvoltagesoftheVCMsforrsttest................43 7.9Circulatingcurrentsofallthethreephasesforrsttest..........43 7.10CapacitorvoltagesoftheSMsforthesecondtest..............44 7.11CapacitorvoltagesoftheVCMsforsecondtest...............45 7.12Circulatingcurrentsofallthethreephasesforsecondtest.........46 7.13CapacitorvoltagesoftheSMsforthethirdtest...............47 7.14CapacitorvoltagesoftheVCMsforthirdtest................48 7.15Circulatingcurrentsofallthethreephasesforthirdtest..........48 7.16Three{phaseac{gridvoltageforcaseII...................49 x
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7.17Simulationresultshowingtheactivepowerreference P ref andthegrid activepower P grid forcaseII........................50 7.18Simulationresultshowingthereactivepowerreference Q ref andthegrid reactivepower Q grid forcaseII.......................50 xi
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1.Introduction Inthiseraofmassivedependenceonnonrenewableenergyresourceslikecoal, oilandnaturalgas,itisextremelyimportanttolookforalternativeformsofenergy topowertheworldaswemightrunoutoftheseresourcesinthenext4050years. Towardsthisend,therehasbeengreatstridesinusingrenewableenergyresources duetotheirvariousadvantages.AccordingtotheGlobalStatusReportreleasedby REN21,theestimatedrenewableenergyshareofglobalelectricityproductionbetween 2014and2018hasincreasedfrom22.1%[1]to26.5%[2].Oneofthemainreasonsfor integrationofrenewablestoglobalenergynetworkisnotonlytomeettheincessantly increasingenergydemandbutalsotoimprovetheenergyreliability,availabilityand protecttheenvironmentfromadverseimpactoffossilfuels[3].Thisriseofrenewable energysourceshasledtorequirementsforhigherpowerandmoreecientconverters. Amongthevariouspowerconvertersthatareavailableinthemarket,multilevel convertersaremostfavoredformedium{highvoltage/powerapplications[4],[5].The useofmultiplesemiconductordevicesallowsforequaldistributionofthevoltagestress oneachdevice,whichinturnincreasesthemaximumratingsoftheconverterwhile usingcheaperandmoreecientsemiconductors.Moreover,themultileveloutput increasesthequalityoftheac{voltagewhilstreducingthesizeandcostoftheoutput lters.Someapplicationsofmultilevelconvertersare,largeelectricalmachinedrives, suchasoshorewindturbines,high{voltagedirectcurrentHVDCtransmission systemsandexiblealternatingcurrenttransmissionsystemsFACTS. Recently,amongthemultilevelconverterfamily,themodularmultilevelconverter MMCwhichwasoriginallyproposedin[6]hasbecomeoneofthemostpromising topologiesinthepastdecadeformedium{highpowerenergyconversionsystems. Theypresentanattractivealternativetotheconventionaltwo{levelvoltagesource convertersbecauseoftheirscalability,modularity,lowerlosses,redundancyandreducedvoltagestressondevices[7].OneofthemainfeaturesoftheMMCisthe 1
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cascadedconnectionofalargenumberofidenticalmodulestermedassubmodules SMswhichcanbeconguredaseitherhalf{bridgeHBorfull{bridgeFBconverters.Thenumberofoutputvoltagelevelscanbeincreasedbyincreasingthe numberofSMs,thusimprovingthequalityoftheoutputac{voltagewaveform.The voltageacrosseachSMissignicantlylowerthanthatofthedc{linkvoltage,thereforeswitcheswithlowervoltageratingscanbeusedinMMCs.Asaresultofthese aforementionedqualities,MMCshavebeenusedinvariousapplicationslike,machine drives[8],windenergyapplications[9],solarphotovoltaicapplications[10]andHVDC transmission[11].MMCsarebecominghighlypopularespeciallyinHVDCtransmissionwheretherstMMC{VSC{HVDCsystemwasinstalledinSanFranciscoin2010 [12].Sincethen,numerouscommercialprojectshavebeencommissioned,including themostpowerfulVSClinkINELFE,whichconnectsFranceandSpain[13]. However,oneofthemainproblemsassociatedwiththeMMCisthepresenceof circulatingcurrentswhichareinherenttotheMMCtopologyandmanifestfromthe variationinthecapacitorvoltagesbetweenthephases[14].Variousmethodsinthe literaturehavebeenproposedtominimizethesecirculatingcurrentslikeincreasing thepassivecomponentssuchasthearminductanceand/ortheresistance,orthecapacitanceoftheSM[15],[16].Increasingthearmresistancewillreducetheeciency oftheconverter,whereasincreasingthearminductanceand/orSMcapacitancewill increasethemonetarycostandtheoverallsizeoftheconverter.[17]proposestheuse ofalterineachphaselegwhichistunedinordertoblockthedominantsecond harmonicofthecirculatingcurrent.Circulatingcurrentshavealsobeenminimized byusingcascadedcontrolloops[18]withwhichthemodulationfunctionofeacharm ormoduleismodied[19].Withthesecontrolmethodologies,acompensationterm M cir j isaddedtothereferenceofthearmvoltagewhichmodiesthereferenceofeach armasshownbelow, 2
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m jp = 1 )]TJ/F29 11.9552 Tf 11.955 0 Td [(Mcos !t + j 2 + M cir j .1 m jn = 1+ Mcos !t + j 2 + M cir j .2 Thecirculatingcurrentscanbeminimizedbyaddingacommon{modevoltage termtothereferencesofthearmvoltages[20].In[21]and[22],aproportional{ resonantcontrollerandarepetitivecontrollerisusedrespectivelytosuppressthe circulatingcurrents.Oneofthemaindrawbacksfromalltheabovemethodsisthat theysuperimposethevoltagereference V ref cir j forthecirculatingcurrentsdirectlyinto themodulationreferenceoftheupperandlowerarms.Duetothiscouplingconnection,theupperandlowerarmmodulationreferencewavesbecomedistortedwhich aectsthequalityoftheoutputACwaveform[23].Moreover,thesecontrolmethodologiesarecomplexinnaturegiventheadditionalcontrolloops. Inordertoalleviatetheaforementioneddisadvantages,thisthesisproposesthe useofadditionalfull{bridgeVCMsconnectedinaline{to{linemannerasshown inFig.4.1tosuppressthecirculatingcurrents.Althoughthissolutionusesextra hardwareasopposedtothepreviousmethods,itprovidesadecouplingbetweenthe powerstageandthecirculatingcurrentsoftheMMC.Asaresultofthis,asimplied controloftheMMCwithanindependentcontroloftheVCMsisachieved.Also,the operationoftheVCMisunaectedbythenumberofmodulespresentintheMMC arm.Furthermore,themagnitudeoftheconverteroutputvoltagecanbeincreased ordecreasedbymanipulatingthevoltagesoftheVCMsexplainedingreaterdetail insection4withoutactuallyincreasingthenumberofSMs. Thethesisisorganizedasfollows;Chapter2talksabouttheobjectivesforthe thesis,Chapter3discussestherelationbetweenthenumberofSMsandthedc{link voltageripple,Chapter4describesthesystemmodelingofthepowerstage,Chapter 5discussesaboutthevariouscontrolmethodologiesinvolved,Chapter6explainsthe 3
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designguidelinesfortheMMC+VCM,Chapter7showsdetailedPSCAD/EMTDC computersimulationstovalidatetheproposedMMC+VCMtopology.Theconcluding remarksaredescribedinChapter8,thecontributionsofthisthesisarestatedin Chapter9andnallythepossiblefutureworksinChapter10closethethesis. 4
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2.Objectives Theminimizationofcirculatingcurrentsisamajortechnicalchallengeinthe MMCtopology.CirculatingcurrentsareaninherentpropertyoftheMMCthat originatefromthevoltagedierencebetweenthephasesandowthroughthethree{ phaseunitswithoutaectingtheac{side.However,ifnotproperlysuppressed,these currentswillaecttherippleoftheSMcapacitorvoltageanddamagethepower semiconductorswitches.Thegoaloftheproposedthesisresearchistosuppressthese circulatingcurrentswiththehelpofadditionalline{to{lineconnectedVCMs.Since thevoltagesources,whicharethesourcesofactivepower,areconnectedinparallel withthecapacitorofeverySMwhichwillbeexplainedindetailintheupcoming chaptersandnoenergysourceisconnectedontothelefthandsideofthedcside, thedc{linkofthisMMCcanberemoved. Therefore,thefollowingobjectivesareset: CirculatingcurrentsuppressionusinglessnumberofVCMsbyconnectingthem inaline{to{linemanner. IntegratingvoltagesourcesintheSMstoenablecontrolonaper{modulebasis andmakingthesystemmorereliable. Supplythepowerloaddemandunderunbalancedconditions. DescribetherelationbetweenthenumberofSMsandthedc{linkripple. 5
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3.Relationbetweensubmodulesanddc{linkripple Figure3.1:ConventionalMMC Fig.3.1showsthecircuitdiagramofaconventionalthree{phaseMMC,which consistsof3legsandeachlegissplitintotwoarmsnamely,upperarmandlowerarm. Thearmsaremadeupof N SMswhicharehalf{bridgeconvertersthatcompriseof acapacitor,twoIGBTswitchesandtwoantiparalleldiodes.ThearmsoftheMMC areconnectedinseriestoalterinductor L a andanequivalentresistance R a . L a ispresenttolimitthecirculatingcurrentsand R a accountsfortheswitchinglosses. ThisMMCtopologyaidsintransferringthepowergeneratedbyeitherawindmill back{to{backconnectionorasolarpvpanelintotheac{grid. Now,whentheMMCisconnectedinaback{to{backtopology[24],thedc{ linkcapacitorbecomesveryimportantfortheproperfunctioningoftheMMCin transferringthegeneratedelectricalpowertothethree{phaseac{grid.Whenthis dc{linkcapacitorisregulatedataxedvoltage,allthepowercomingfromthedc{ 6
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sidewillbedirectlysentintotheac{gridwithoutanypowerowingintothedc{link capacitor.Toachievethisgoal,eithera V 2 dc controlora V dc controlisimplemented [25]. However,inthisthesisthereisnopowersourceconnectedtothedc{sideof theMMCandsincethevoltagesourceswhicharethesourcesofactivepowerare integratedintheSMsoftheMMC,thereisnoneedforadc{linkcapacitortobe presentinthecircuit.Oneofthemainfunctionsofacapacitoristosmoothenthe waveformbyreducingtheripple.Thischapterdiscussestherelationbetweenthe numberofSMsandthedc{linkripple.Twocasesarepresentedwhichinvolvethe simulationsconductedwiththepresenceofacapacitorandonewithoutthecapacitor. 3.1Case1:withdc{linkcapacitor Aftercarefullystudyingthecircuitwiththepresenceofthedc{linkcapacitor,it wasfoundthatthesolepurposeofthiscapacitorisjusttosmoothenthewaveform andreducetheripple.Inordertoshowthiseect,threeseparatetestswiththree dierentcapacitorswereconducted.Fig.3.2showstheMMCsystemforthree dierentcapacitances.TheMMCsubsystemisthesameasthatofFig.4.1without theVCMs. a b c Figure3.2:MMCwithdierentcapacitors.a:0.1 Fcapacitor;b:1mFcapacitor;c:1Fcapacitor Accordingto[18],thedc{linkvoltageisgivenby.1, 7
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V calc dc = V uj + V lj +2 L arm di j dt : .1 where, V calc dc isthecalculateddc{linkvoltage, V uj and V lj arethevoltagesoftheSMs inthetopandbottomarmsofphase j respectivelyand L arm di j dt isthevoltage acrossthearminductor.Additionally,thedc{linkvoltagewasalsomeasuredfrom thepositiveterminaltothenegativeterminalofthephase{leginordertocompare bothsetsofresults.Themeasureddc{linkvoltageistermedas V meas dc .From.1we canseethatthevoltageacrossthearminductoralsocontributesintheformationof thedc{linkripple. 3.1.1Test1:0.1 Fdc{linkcapacitor Inthiscase,averysmallcapacitanceof0.1 Fischosen.Fig.3.3showsthe simulationresultsforphaseawiththedc{linkcapacitorforthersttest.FromFig. 3.3awecanseethatthemeasuredandcalculateddc{linkvoltagesaresimilarwith bothswitchingattheratedswitchingfrequencyof5000Hzascanbeveriedfromthe zoomedinaxis.Fig.3.3bshowsthevoltageacrosstheSMsofthetopandbottom armswhichareinmultilevelformatgoingfrom0to600.Itisimportanttonotethat thetotalphase{legvoltagerippleisthesourceofthedc{linkvoltageripple[18].As aresultofthis,thevoltageacrosstheinductoralsoplaysaroleindeterminingthe rippleacrossthedc{link. 3.1.2Test2:1mFdc{linkcapacitor Forthesecondtest,thecapacitanceisincreasedto1mF.AscanbeseenfromFig. 3.4a,theripplebecomesverysmoothwhencomparedtothersttest.Thevoltages oftheSMsofthetopandbottomarmsstillremainthesame.However,thevoltage acrosstheinductornowchangesalittlebittoaidinthereductionofthedc{link ripple. 8
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a b c Figure3.3:Simulationresultsforrsttest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltagesofthe arminductorsofthetopandbottomarms a b c Figure3.4:Simulationresultsforsecondtest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltagesofthe arminductorsofthetopandbottomarms 9
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a b c Figure3.5:Simulationresultsforthirdtest.a:Measuredandcalculateddc{link voltage;b:voltagesoftheSMsofthetopandbottomarms;c:voltagesofthe arminductorsofthetopandbottomarms 3.1.3Test3:1Fdc{linkcapacitor Forthethirdandnaltest,averylargecapacitanceof1Fischosen.FromFig. 3.5a,wecanseethatthereisalmostnorippleinthesystem.So,wecansaythat thecapacitorkindoffunctionsasaconstantvoltagesource.Thevoltagesofthe SMsofthetopandbottomarmsandtheinductorvoltagearesimilartothesecond test.Fromallthethreetests,wecanconcludethatthedc{linkcapacitanceissolely presenttoreducetherippleofthedc{link. 3.2Case2:nodc{linkcapacitor SimulationswereconductedtostudytherelationbetweenthenumberofSMsand thedc{linkpeak{to{peakripplewiththeabsenceofthecapacitor.Table3.1shows therelationbetweenthetwoandtheimpactthisripplehasontheotherparameters ofthesystem. Fromtable3.1wecanconcludethatthisdc{linkripplehasnoeectonthe 10
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Table3.1:Relationbetweendc{linkrippleandnumberofSMs NumberofSMs V C Ripple PkW QkVAr Gridvoltage 2 300 600 10 0 240 3 200 400 10 0 240 4 150 300 10 0 240 5 120 240 10 0 240 6 100 200 10 0 240 ac{sideofthesystemastheactiveandreactivepowersalongwiththegridvoltage remainthesameirrespectiveofthenumberofSMspresentintheMMC. FromFig.3.6wecanseethatasthenumberofSMsincreases,thedc{linkripple reduces.BylookingattheSMcapacitorvoltageandthedc{linkripplecolumnof table3.1,wecanconcludethatthedc{linkrippleistwicethecapacitorvoltageofa SM.Towardsthisend,thefollowingcanbeobtained, dV=2 V C i ; .2 wheredVisthedc{linkrippleand V C i isthecapacitorvoltageofthei th SMwhichis givenasfollows, V C i = V ref dc N ; .3 where V ref dc isthedc{linkreferencevoltageand N isthenumberofSMs.Finally, substitutingthevalueofthecapacitorvoltageofthei th SMfrom.3in.2,gives ustherelationbetweenthenumberofSMsandthedc{linkrippleasfollows, dV=2 V ref dc N : .4 11
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Figure3.6:SimulationresultsshowingtherelationbetweenthenumberofSMsand thedc{linkpeak{to{peakripplewithoutdc{linkcapacitor. 12
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4.Systemmodeling ThecircuitschematicofFig.4.1illustratestheproposedMMC+VCMsystem. ItincludesanMMCactingasaninverter,avoltagesourceintegratedintheSMof theMMC,aVCMforvoltagecompensation,anLC{lterinserieswithacoupling transformerthatconnectstothethree{phaseac{grid. Figure4.1:ProposedMMC+VCMsystem 4.1Modularmultilevelconverter Followingtheexplanationgiveninchapter3andreferringtotable4.1,thepossible switchingstatesoftheHBSMcanbeunderstood.ThetwoswitchesS1andS2in theSMoperateinacomplimentarymanner,i.e.whenS1isON,S2isOFFandvice versa.Basedonthestateofthetwoswitches,theSMiseitherconnectedorbypassed fromthearminsertingavoltageequalto V C or0[6]. 13
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Table4.1:SwitchingstatesoftheSM SMstate S1S2 SMvoltage ON ONOFF V C OFF OFFON 0 TheoperationoftheSMisillustratedinFig.4.2.WhentheSMisnotconnected tothearmOFFstatethecapacitorvoltageremainsconstant,whilethecapacitor voltagewhentheSMisconnectedONstatetothearmdependsonthedirectionof thearmcurrent.Inotherwords,thecapacitorstartstochargedischargewhenthe armcurrentispositivenegative. aSMisON bSMisOFF Figure4.2:SwitchingoperationofthehalfbridgeSM Themainideaofusingmultilevelconvertersisthesynthesisofasinusoidalvoltage byutilizingseverallevelsofvoltages.InthecaseofanMMC,thesevoltagelevelsare obtainedfromthecapacitanceofeverySM.Atanygiventime,manySMsareswitched on,sothatthevoltageattheconverteroutputterminalsequalstheinstantaneous valueofthevoltagetobesynthesized[7].Inpractice,thenumberofSMswillbe quitelarge{300SMs[12]andthereforewillfeaturehigh{qualitywaveformeven 14
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foraworst{casescenario. ThearmvoltageoftheMMCcanbecomputedbyconsideringtheinsertionindex n t .Letthetotalavailablearmvoltagebeequalto v P c t ,thenthevoltageinserted bythearm i forphase j = a;b;c isgivenbythefollowingequation[26]. V ji = n t )]TJ/F29 11.9552 Tf 5.48 9.684 Td [(v P c t : .1 Letthearmcurrentsbedenedby I jp and I jn wherepdenotespositivetoparm currentandndenotesnegativebottomarmcurrent.AccordingtoFig.3.1and[26] wehavethefollowingforthearmcurrents, I jp = i j 2 + I cir j ; .2 I jn = )]TJ/F29 11.9552 Tf 10.494 8.088 Td [(i j 2 + I cir j ; .3 where I cir j isthecirculatingcurrentthatcirculatesbetweentheparallelphaselegs. Theequationforthecirculatingcurrentsisasfollows, I cir j = I jp + I jn 2 : .4 Thesecirculatingcurrentsaregeneratedbythevoltagedierencebetweenthe phasesandowthroughthethreephaseunitswithoutaectingtheac{sidevoltages andcurrentsoftheMMC[27].However,ifnotproperlysuppressedthesecurrents willaecttherippleofthecapacitorsoftheSMsandincreasethermsvaluesofthe armcurrentswhichsubsequentlyresultinhigherpowerconverterlosses. Finally,thedc{sideandac{sidevoltagesoftheMMCarecomputedbyapplying kirchho'svoltagelawKVLtoFig.3.1, 15
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V dc = R a I jp + I jn + L a dI jp dt + dI jn dt + V jp + V jn ; .5 v j = V jn )]TJ/F29 11.9552 Tf 11.956 0 Td [(V jp 2 + R a 2 I jn )]TJ/F29 11.9552 Tf 11.955 0 Td [(I jp + L a 2 dI jn dt )]TJ/F29 11.9552 Tf 13.151 8.087 Td [(dI jp dt : .6 Assumingthatthevoltageinanarmisequallysharedamongthearm'sSMs,the energystoredinthearm i ofphase j isgivenasfollows, W ji = V 2 arm ji C arm 2 ; .7 where C arm istheequivalentarmcapacitancewhichisgivenas C arm = C=n and V arm ji isthetotalcapacitorarmvoltagewhenalltheSMsareconnected. Therefore,thetotalenergystoredinthelegofphase j andtheenergydierence betweenthearmscanbecalculatedasshownbelow, W total j = W jp + W jn ; .8 W di j = W jp )]TJ/F29 11.9552 Tf 11.955 0 Td [(W jn : .9 where W jp and W jn arethetotalenergyoftheupperarmandlowerarmrespectively. 4.2LC{lter LC{ltersareusedtominimizetheamountofcurrentthatisinjectedintothe ac{grid[28].Theseltersachievehighereciencyalongwithcostsavings,given theoverallweightandsizereductionofthecomponents.Goodperformancecanbe obtainedintherangeofpowerlevelsuptohundredsofkW,withtheuseofsmall valuesofinductanceandcapacitance. ThecircuitschematicoftheLC{ltermodelisshowninFig.4.1,where, L f , R f and C f arethelterinductance,capacitanceanddampingresistancerespectively. 16
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4.3Voltagecorrectionmodule Whenthearmvoltagesareoperatingatdierentoperatingpoints,therewillbea voltagedierencebetweenthephaseswhichwillgiverisetohugecirculatingcurrents. Inordertoalleviatethissituation,VCMsareintroducedinbetweenphasesasshown inFig.4.1.TheVCMsconsideredinthisapplicationareFBmoduleswhichhave threeswitchingstates v vcm " f)]TJ/F15 11.9552 Tf 15.276 0 Td [(1 ; 0 ; 1 g thatareassociatedwiththevoltagesinjected bythemodules.AcarrierbasedPWMschemeisadoptedtodrivetheVCMs.There areatotaloffourVCMs,oneinbetweenthephasesinthetopandbottomarms. ThedetailedswitchingstatesfortheVCMsareshownintable4.2. Table4.2:SwitchingstatesoftheVCM VCMstate S1S2S3S4 VCMvoltage 1 1001 V vcm 0 1010 0 0 0101 0 1 0110 )]TJ/F29 11.9552 Tf 9.299 0 Td [(V vcm Fig.4.3showstheequivalentcircuitoftheMMC+VCMsystemforphasesa andb. v a ;v b ;i a and i b aretheconverteroutputvoltagesandcurrentsforphases aandbrespectively.Theupperandlowerarmvoltagesare V ap ;V bp ;V an and V bn respectively.Lastly,theVCMcapacitorvoltagesaregivenby V ab u vcm fortheupperhalf and V ab l vcm forthelowerhalf.Toexaminetheinterdependencebetweenthecirculating currentsandthecapacitorvoltagesoftheSMs,acontinuousmodeloftheMMCis usedwhereitispossibletorepresentthearmsasvariablevoltagesourceswiththeir valuesdependingontheinsertionindex n t .Followingtheexplanationgivenin section4.1andapplyingKVLtotheinnerloopofFig.4.3,thearmcurrents,the VCMcapacitorvoltagesandthecontinuousmodeloftheMMC+VCMcanberelated asfollows, 17
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Figure4.3:EquivalentcircuitoftheMMC+VCMsystem. R a I ap )]TJ/F29 11.9552 Tf 11.955 0 Td [(I bp + L a dI ap dt )]TJ/F29 11.9552 Tf 13.15 8.087 Td [(dI bp dt = V bp )]TJ/F29 11.9552 Tf 11.955 0 Td [(V ap + v b )]TJ/F29 11.9552 Tf 11.955 0 Td [(v a + V ab u vcm ; .10 R a I an )]TJ/F29 11.9552 Tf 11.955 0 Td [(I bn + L a dI an dt )]TJ/F29 11.9552 Tf 13.15 8.088 Td [(dI bn dt = V bn )]TJ/F29 11.9552 Tf 11.955 0 Td [(V an + )]TJ/F29 11.9552 Tf 9.299 0 Td [(v b + v a + V ab l vcm ; .11 Adding.10and.11givestherelationshipbetweenthecirculatingcurrents andtheVCMcapacitorvoltages, R a I cir a )]TJ/F29 11.9552 Tf 11.955 0 Td [(I cir b + L a dI cir a dt )]TJ/F29 11.9552 Tf 13.151 8.088 Td [(dI cir b dt = V bp + V bn 2 )]TJ/F29 11.9552 Tf 10.584 8.088 Td [(V ap + V an 2 + V ab u vcm + V ab l vcm 2 : .12 From.12,wecanseethatthecirculatingcurrentscanbeeliminatedorsignificantlyreducedbymakingtherighthandsideof.12equaltozerowhichcanbe donebyaddinganequalandoppositevoltagetothevoltagedierencebetweenthe phases. Subtracting.11from.10andisolatingoneofthephasesgivestheconverter's outputvoltageforphase j asfollows, 18
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v j = V jn )]TJ/F29 11.9552 Tf 11.956 0 Td [(V jp 2 + R a 2 I jn )]TJ/F29 11.9552 Tf 11.955 0 Td [(I jp + L a 2 dI jn dt )]TJ/F29 11.9552 Tf 13.151 8.087 Td [(dI jp dt + V ab u vcm )]TJ/F29 11.9552 Tf 11.955 0 Td [(V ab l vcm 2 : .13 Itisobviousfrom.13thattheconverter'soutputvoltage v j canbeincreased byutilizingthevoltagedierencebetweentheVCMs.However,forthisapplication theVCMsarecontrolledinsuchamannerthattheinsertedvoltagesareequalinthe respectivearmsmakingthevoltagedierencebetweentheVCMsalmostzeroand therebyhavingaminoreectontheconverter'soutputvoltage. 19
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Figure5.1:CircuitschematicoftheproposedMMC+VCMsystemdisplayingthe variablesutilizedinthevariouscontrollers. 5.Controlmethodology ThecontrolmethodologyfortheMMC+VCMsystemasshowninFig.5.2consistsofvecontrollers.Thesecontrollersareutilizedfortheproperfunctioningof theMMC.Thevecontrollersandtheircontrolobjectivesare: i avoltagesource inverterVSItwo{layercontrollertotransferthegeneratedpowerintotheac{grid, ii alegenergycontrollertocontroltheenergystoredinthecapacitorsoftheSMs inordertoensurestableoperationoftheMMC, iii amodulatorwhichconsists ofaphase{dispositionpulsewidthmodulationPDPWMthatdeterminestheSMs thatneedtobeswitchedonandavoltagebalancingalgorithmVBAtobalancethe 20
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Figure5.2:Overviewoftheoverallcontrolsystem capacitorvoltagesoftheSMs, iv acirculatingcurrentsuppressingcontrollertosuppresstheinnercirculatingcurrentsand v aVCMcontrollertocompensateforthe voltagedierenceduringunbalanceconditions.BoththecirculatingcurrentsuppressingcontrollerandVCMcontrolleraredecoupledfromthemainpowerstagecontrol andeachofthesecontrollersaredescribedindetailinthefollowingsubsections. 5.1VSI{twolayercontroller Thewidelyutilizeddirectcurrentcontrolmethodthatiswellexplainedin[25] isadoptedtoverifytheperformanceoftheMMC+VCM.Asaresultofthis,the 21
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Figure5.3:SchematicoftheMMC+VCMVSItwo{layercontrollerwithPLLand innercurrentcontrol. outerpowercontrollerandtheinnercurrentcontrollerarealmostidenticaltothe2 level3phaseVSI[29].AsseeninFig.5.3,thisVSItwo{layercontrollerisbroken downintothreeblocks: i aphaselockedloopPLLforac{gridsynchronization, ii power{to{currenttransformationand iii thetraditionalcurrentcontrolinthe directquadraturedqrotatingreferenceframetotransferthepowergeneratedinto theac{gridatanarbitrarypowerfactor. 5.1.1Phaselockedloop Sincethecontrolofthepowerfactorisacommongoalforutilitygridconnected systemsandrequirestheaccuratephaseinformationoftheutilityvoltages,thephase trackingsystemisoneofthemostimportantpartsofthesesystems[30].ThePLL techniquehasbeenusedasacommonwayofrecoveringandsynthesizingthephase andfrequencyinformationinelectricalsystems.ThePLLcomputesthegridphase anglebysensingthegridvoltageandprojectingthecorrespondingspacevectoronto thedqaxis.Theqcomponentisthenforcedtobeequaltozero v q =0withthehelp ofaPIcontrollerasshowninFig.5.3.Bydoingso,thedqaxiswillberotatingat thesamespeedasthegridangularfrequency.Thisangleisthenusedtosynchronize thedqreferenceframefortheinnercurrentcontrol.Thecompleteprocedureforthe PLLcontrolisexplainedin[25]. 22
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5.1.2Power{to{currenttransformation Theactivepowerreference P ref andthereactivepowerreference Q ref willbe ourcontrolhandlesandaredependentontheloadrequirement.Fromthesereferences, thedqcurrentscanbecomputedaccordingly: P ref = 3 2 v d I ref d ; .1 Q ref = )]TJ/F15 11.9552 Tf 10.494 8.088 Td [(3 2 v d I ref q .2 ThisequationisbasedontheassumptionthatthePLLisabletoforce v q to zero.MMCtopologiesoerindependentcontrolofreactivepower.Dependingonthe gridconditions,bycontrollingthereactivepower,theMMCcaneithergeneratea speciedreactivepowertotheac{grid,orcanregulatethepowerfactor. 5.1.3Innercurrentcontrol Thethreephaseac{sidedynamicsoftheVSIcanbedescribedbythefollowing dynamic{phasorrelationinthe abc referenceframe, L s di j dt = )]TJ/F29 11.9552 Tf 9.298 0 Td [(R s i j + V j )]TJ/F29 11.9552 Tf 11.955 0 Td [(v j ; .3 where, V j = V dc 2 m j , v j and i j arethethreephaseacvoltagesandcurrentsattheVSI's acterminalrespectively, L s and R s aretheequivalentinductanceandresistanceat theVSIsidewhicharedenedbythefollowingequations, L s = L f + L a 2 ; R s = R a 2 : ByapplyingthefamousParktransformation,theac{sidedynamicsoftheVSI canberepresentedinthedqreferenceframeasfollows, 23
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Figure5.4:Closed{loopd{axisandq{axiscurrentcontrollersfortheVSItwo{layer controller. L s di d dt = !L s i q )]TJ/F29 11.9552 Tf 11.955 0 Td [(R s i d + V d )]TJ/F29 11.9552 Tf 11.956 0 Td [(v d ; .4 L s di q dt = )]TJ/F29 11.9552 Tf 9.298 0 Td [(!L s i d )]TJ/F29 11.9552 Tf 11.956 0 Td [(R s i q + V q )]TJ/F29 11.9552 Tf 11.955 0 Td [(v q : .5 From.4and.5wecanseethataqcomponentispresentinthed{axis equationandviceversa,meaningthereisnodecouplingbetweenthetwoandaltering oneoftheparameterswillaecttheotheronetoo.Inordertoachieveadecoupling betweenthetwoequationsanddesignacurrentcontrolloopfortheVSItwo{layer controller,weneedtointroducetwonewcontrolvariablescalled u d and u q asfollows, u d = !L s i q + V d )]TJ/F29 11.9552 Tf 11.955 0 Td [(v d ; .6 u q = )]TJ/F29 11.9552 Tf 9.298 0 Td [(!L s i d + V q )]TJ/F29 11.9552 Tf 11.955 0 Td [(v q : .7 Byusing.4and.5in.6and.7,twodecoupled,rstorder,single{ input{single{outputSISOsubsystemscanbegeneratedasshownbelow, 24
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L s di d dt = )]TJ/F29 11.9552 Tf 9.298 0 Td [(R s i d + u d ; .8 L s di q dt = )]TJ/F29 11.9552 Tf 9.298 0 Td [(R s i q + u q : .9 Thecurrentreferencesfromsubsection5.1.2arethencomparedwiththeirrespectivemeasurementsasshowninFig.5.4.Anerrorisgeneratedwhichisdrivento zerowiththehelpoftwodecoupledPIbasedcompensators.Theoutputsignalfrom thesecompensatorsisthentransformedintothe abc referenceframeusingtheinverse Parktransformationandthenfedintothemodulator. ThetransferfunctionofthePI i isgivenbythefollowingequation, PI i s=Kp i + Ki i s .10 Oneofthemainreasonsforemployinghardlimitersforthecurrentcontrolisto protecttheVSIagainstovercurrents.AsseeninFig.5.3thecurrentlimitersprevent thecirculationoflargecurrentsthroughtheSMs,protectingtheVSIagainstashort circuitcurrentthatmightoccurontheac{side. 5.2Legenergycontroller TheenergystoredinthecapacitorsofalltheSMsneedstobecontrolledina propermannertoensureastableoperationoftheMMC.Toachievethis, V arm ji needs tobemeasuredandthetotalenergystored W ji inthearm i ofphase j canbe calculatedbasedon.7.Fig.5.5showstheschematicofthelegenergycontroller whichcomprisesofatotallegenergycontrolandanarmenergydierencecontrol, andamodulator.ThecontrolschemeasdepictedinFig.5.5isbasedonthepremise that W ji ofoneMMClegcanberegulatedbycontrollingthedccomponentofthe circulatingcurrent. 25
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Figure5.5:Schematicoflegenergycontrollerwithmodulator. 5.2.1Totallegenergycontrol Since,thecirculatingcurrent I cir j isdrivenby V cir j anddependsontheMMC arminductance,adccomponentof V cir j willbesucientformaintainingthetotal capacitorenergyatthedesiredlevel.ThetotallegenergycontrolshowninFig.5.6 regulates W total j toadesiredreferenceenergylevel W ref total j whichistypicallytheenergy ofthelegwhenthearmvoltageequalsthedc{linkvoltage.Themeasuredenergyis driventoitsreferencewiththehelpofaPIbasedcompensator[26]givenby, V total j = W ref total j )]TJ/F29 11.9552 Tf 11.955 0 Td [(W total j Kp total j + Ki total j s : .11 5.2.2Armenergydierencecontrol ThearmenergydierencecontrolasshowninFig.5.7aimsatcancellingthe energydierencebymanipulating I cir j .From[26]weknowthat I cir j cannotbedirectly controlledbutcanbeaccessedthrough V cir j .Anotherproblemwiththiscontrolis thatthephaseofthecontroloutputmustlead I cir j byargumentof Z a whichisdened as Z a = R a + L a andargumentof V j .Itisnoteworthytosaythatinsteadystate, 26
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Figure5.6:Schematicoftotallegenergycontrol. W di j containsconsiderablefundamentalcomponents.Therefore,attheoutputofthe dierencecontrolleralow{passlterisusedtoeliminatehigh{frequencycomponents. Tocancelthelegenergydierence,thereferenceforthelegenergybalancecontrol shouldbe0.Themeasuredlegenergycontrolisthendriventoitsreferencewiththe helpofaPI{basedcompensatorwhichisgivenasfollows, V di j = W ref di j )]TJ/F29 11.9552 Tf 11.955 0 Td [(W di j Kp di j + Ki di j s cos arg V j +arg Z a : .12 Figure5.7:Schematicofarmenergydierencecontrol. 5.3Modulator Inthecontextofmultilevelconverters,variousmodulationstrategieshavebeen proposedtogenerategatesignalsfortheconverter'sIGBT's,witheachonehavingits 27
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ownadvantagesanddisadvantages[31],[32].Inordertosynthesizeanacwaveform voltageattheac{sideoftheMMC,SMsmustbeconsistentlyinsertedintoorbypassed fromthesystem.Therefore,atanypointoftime,thenumberofSMsswitchedon ineacharm N jp ; n mustbecalculated.Since,theMMCisbasedonthecascade connectionofmultiplebidirectionalSMsperleg,capacitorvoltagebalancingofthe SMsbecomesnecessaryforstableoperationoftheMMC[33].Withthesorting algorithm,allofthecapacitorvoltagemeasurementsaresortedineitherascending ordescendingorderoftheirvoltagemagnitudes,andeachcapacitorisselectedtobe eitherconnectedorbypassed[34].Thedetailedexplanationalongwiththeowchart isexplainedintheupcomingsubsection. 5.3.1Phasedispositionpulsewidthmodulation WhenthenumberofSMsandthevoltagelevelsarelow,thePDPWMtechnique ispreferred.WithPDPWM,thepulsepatternforthemodulesisgeneratedby comparingthemodulatingsignalofthearmvoltagewithNcarrierwaveformswiththe samefrequencyandamplitude.Byusingthismethod,alowerharmonicdistortionfor theterminalvoltageandcurrentisobtained[35].ThenumberofSMstobeswitched onisdeterminedbytheintersectionsofthemodulatingsignalandthecarrierwaves. Fortheupperandlowerarmsofeachleg,themodulatingsignalsarecomputedas follows, M jp = 1 V arm jp V dc 2 )]TJ/F29 11.9552 Tf 11.955 0 Td [(E j )]TJ/F29 11.9552 Tf 11.955 0 Td [(V total j )]TJ/F29 11.9552 Tf 11.955 0 Td [(V di j ; .13 M jn = 1 V arm jn V dc 2 + E j )]TJ/F29 11.9552 Tf 11.955 0 Td [(V total j )]TJ/F29 11.9552 Tf 11.956 0 Td [(V di j : .14 where, M jp and M jn arethemodulatingsignalsfortheupperandlowerarmsrespectively.Fig.5.8showsthePDPWMmodulationschemefora7levelMMC.Itcanbe seenthatforan n +1levelMMC, n triangularcarrierwavesareusedwhichfeature thesameamplitude,frequencyandphase.ThenumberofSMstobeinsertedinthe 28
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Figure5.8:PD{PWMmodulationschemefora7levelMMC. upperarmofphase j , N jp ,iscomputedbycomparingthemodulatingsignalwith eachcarrierwaveform.ThenumberofSMstobeinsertedinthelowerarmofthe samephaseis N jn = n )]TJ/F29 11.9552 Tf 11.956 0 Td [(N jp . 5.3.2Voltagebalancingalgorithm DuetothetopologyoftheMMC,thecapacitorvoltagebalanceissuebecomes veryimportant.VBAisusedtobalancethecapacitorvoltagesoftheSMsineach armoftheMMC[24].Inthisthesiswork,theVBAisarmspecicandaimstosort thearmcapacitorvoltagesanddecideswhichSMstobeswitchedonbasedonthe capacitorvaluesandthedirectionofthearmcurrents. TheVBAfollowedinthisresearchisbasedonthealgorithmstatedin[36].Fig. 5.9showstheowchartoftheVBA.ThisprocessofsortingtheSMcapacitorvoltages consistsofthreesteps.TherststepisacceptingtheSMvoltagemeasurements 29
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Figure5.9:Flowchartofthevoltagebalancingalgorithmfortheupperarm. andthecurrentmeasurementsfromthearmsandnallythenumberofSMsthat areswitchedonfromthemodulator.Thesemeasurementsarethensortedintoan ascendingsequencematrix.Inthenalstep,theSMsareinserteddependingonthe direction/polarityofthearmcurrent.Ifthearmcurrentispositive,thecapacitor oftheinsertedSMwillbechargedanditsvoltagewillincrease.Hence,thevoltage balancingalgorithmwillchoosetheSMswiththelowestvoltagetoreducethevoltage dierencebetweenthem.Similarly,ifthearmcurrentisnegative,thecapacitorofthe insertedSMwillbedischargedanditsvoltagewilldecrease.Therefore,thevoltage balancingalgorithmwillchoosetheSMswiththehighestvoltagetoreducethevoltage dierencebetweenthem. 5.4Circulatingcurrentsuppressingcontroller Asstatedinsection4.1,thecirculatingcurrentsoriginatefromthevoltagedifferencebetweenthephasesandowthroughthethreephaseunitswithoutaecting theac{sidevoltagesandcurrentsoftheMMC.Typically,thesecond{orderharmonic isthemajorcomponentofthecirculatingcurrentsanditispresentintheformof negative{sequencetotheloadcurrentswithitsfrequencybeingtwicethefundamentalfrequency[37],[14].Accordingto[38],theinstantaneouspoweroftheupperarm andlowerarmsoftheMMCinphaseaarecalculatedasfollows, 30
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p pa = u pa t :i pa t = U dc I dc 6 [1+ m:sin ! 0 t + ' ] )]TJ/F29 11.9552 Tf 11.955 0 Td [(k:sin! 0 t .15 p na = u na t :i na t = U dc I dc 6 [1 )]TJ/F29 11.9552 Tf 11.955 0 Td [(m:sin ! 0 t + ' ]+ k:sin! 0 t .16 Byintegrating.15and.16andaddingbothresults,theaccomponentof thetotalenergystoredinphaseunitaiscalculatedasfollows, W PUa ac t = Z p pa + p na :d t = P s 6 ! 0 sin :! 0 t + ' .17 From.17,wecanseethatafrequencyof2 ! 0 tshowsup.Asaresultofthis, thephaseunitvoltagealsocontainsadccomponentandanaccomponentatdouble linefrequencyasshowninthefollowing, U PUa = U PUa dc + U PUa ac = U dc + U 2f sin :! 0 t + ' .18 Asthedccomponentsofthethreephaseequivalentunitvoltagesareequalandas theaccomponentsofthevoltageslageachotherby120 0 atdoublelinefrequency,the circulatingcurrentsalsoatdoublelinefrequencyareexcitedinthesystem.Hence, thecirculatingcurrentsexistattwicethefundamentalfrequency.Additionally,[39] conductedsimulationswithandwithoutacirculatingcurrentcontrollerCCCand itwasfoundthatthecirculatingcurrentsaswellasthearmcurrentsconsistedofa doublefrequencycirculatingcurrentcomponentintheabsenceofCCC. Fig.5.10showsthecompletecontrolmethodologyforthesuppressionofcirculatingcurrents.Thethree{phasecirculatingcurrentsinnegative{sequencea{c{b framearetransformedintothedqdomainusing =2 !t asthereferenceangular position.Thesedqquantitiesarethencomparedagainsttheirrespectivereferences whicharezerosincethecirculatingcurrentsshouldbeclosetozeroandanerror 31
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Figure5.10:Circulatingcurrentsuppressingcontroller. isgeneratedwhichisdriventozerowiththehelpofPI{basedcompensators.Finally,thedqtoacbtransformationisusedtogeneratevoltagereferences V cir j foreach phase{legwhicharedividedequallyandaddedtothevoltagereferenceofthetop andbottomVCMs[40]. 5.5VCMcontroller AVCMisemployedinbetweenphasesasshowninFig.4.1whichcontributes incompensatingforthevoltagedierencebetweenphasesandtherebyimprovingthe reliabilityoftheMMCaswellasinmaintainingthecirculatingcurrents.ThiscontrolisusedtomaintainthevoltageoftheVCMcapacitorsattheiroptimumvalue V ref cv .ThisreferenceiscomparedwiththemeasuredcapacitorvoltageoftheindividualVCMandtheerrorisdriventozerowiththehelpofaproportionalcontroller. ThisproportionalcontrollerisenoughtocontrolthedcaverageoftheVCMcapacitorvoltageasthecapacitorvaluekeepschangingcontinuouslyandthesteadystate errorneednothavetobezeroaccordingto[10].Thiscapacitorvoltageincreasesor decreasesbasedonthedirectionoftheVCMcurrent.Finally,thevoltagereferences V ab u ; l VCM ref arecomparedagainstcarrierwaveformstogenerateswitchingsignalsfor theVCMs.Fig.5.11showsthecontrolschemefortheVCMsinbetweenphasesa andb. 32
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Figure5.11:VCMcontroller. 33
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6.Designguidelines TheMMCandac{gridsideparametersareadoptedfrom[36].Adc{linkreference valueof600VisselectedinordertoensurethatthemodulationindexoftheVSI two{layercontrollerislessthan0.95.Theharmoniccurrentcontentoftheinjected currentstotheac{gridisdirectlyrelatedtothenumberofSMsinanarm[41].Asa resultofthis,atotalof6SMsperarmalongwithareducedsizedLC{lterischosen sothatthetotalharmonicdistortionTHDoftheinjectedcurrentsislessthan5%. ThereferenceforthenominalSMvoltageisgivenasfollows[42], V C = V ref dc N : .1 From.1wecansaythatthenominalSMvoltageis100V. Asstatedinsection4.1,weknowthatatanygivenpointintime,onlyoneof theIGBTsinaSMwillbeconductingwhiletheotherIGBTwillbeswitchedo. Therefore,eachindividualIGBTshouldhaveavoltageblockingcapabilityofmore than100V.TheIGBTmodelFGH50N3,manufacturedbyFairchildsemiconductor isselectedforthisthesis.ThisIGBThasavoltageblockingcapacityof300Vand amaximumconductingcurrentof50A.TheresistanceofthisIGBTis63mand thetotalresistanceofeachconverterarmconsideringtheseriesconnectionof6SMs is378m.ThesizingoftheSMcapacitorisbasedonthefactthatthecapacitor voltagerippleisbelow5%andthereforethevaluechosenfortheSMcapacitoris27.6 mF.Finally,thearminductance L a isselectedas15%ofthesystem'sbaseinductance followingthemethodologyexplainedin[43], Z s = v j 2 S ; L a =0 : 15 Z s ; where Z s isthebaseimpedanceofthesystem.Therefore,thearminductancechosen 34
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forthisthesisis L a =1 : 9mH.Lastly,theac{gridcouplingtransformerisratedat24 kVAwithatransformationratioof240/480andaleakageinductanceof8%. Inpractice,theMMCwillusuallyfeaturearound200levelsandinsuchascenario, thereisnoneedofanLClterattheacterminals[44].However,whenthereare reducednumberoflevels,LC{ltersarerequiredtominimizeharmoniccontentsat theacterminals.Since,thePDPWMtechniqueisadoptedinthiswork,thesizeof theLC{ltersisfurtherreduced.ThisLC{lterisdesignedtobecompliantwiththe harmonicconditionsasgivenintheIEEE1576standards.TheLC{lterinductance, capacitanceanddampingresistanceforthisworkwerechosentobe L f =4 : 9mH, C f =6 : 9 Fand R f =0 : 69respectively. TheVCMswitchesshouldbeabletoblocktheaveragemaximumvalueofthe VCMcapacitorvoltageandthisvaluedependsonthevoltagediscrepancybetween thephases.Ingeneral,thecirculatingcurrentscanonlybesuppressediftheaverage voltageissucienttominimizethisvoltagediscrepancy.Sincethearmcurrentsalso owthroughtheVCMs,thecurrentratingoftheVCMswitchesisthesameasthat oftheSMs.ThevariousparametersoftheMMC+VCMconsideredinthissimulation arelistedintable6.1. 35
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Table6.1:MMC+VCMsystemparameters Item Parameter Symbol Value MMC NumberofSMsinonearm n 6 SMcapacitance C 27.6mF VCMcapacitance C vcm 27.6mF VCMcarrierfrequency f cr 1kHz Arminductance L a 1.9mH Armequivalentresistance R a 0.1 SMswitchingfrequency f sw 5kHz NominalSMvoltage V C 100V SMseriesresistance r sm 0.01 Filter Filterinductance L f 4.9mH Filtercapacitance C f 6.6 F Dampingresistance R f 0.69 Couplingtransformer Ratedpower S 24kVA Turnsratio V s =V p 240/480 Leakageinductance L T 8% ACgrid Gridvoltage V g 480V Gridfrequency f g 60Hz Shortcircuitpower 3MVA X/Rratio 1.5 Loaddemand Activepower P 10kW Reactivepower Q 0kVAr 36
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7.Simulationresults Inordertoverifytheperformanceoftheproposedcontrolmethodology,adetailed modelbasedonthetime{domainsimulationtoolPSCAD/EMTDCisdeveloped.The variousparametersoftheMMC+VCMsystemconsideredinthissimulationarelisted inTable6.1.Theactiveandreactivepowerreferencesarechosentobethecontrol handleswhichdependontheloadrequirement.Twocasestudiesareconsideredto evaluatetheperformanceoftheproposedMMC+VCMsysteminstandardoperating conditionandunbalancedcondition. 7.1CaseI:standardoperatingcondition Inthiscase,alltheSMsareoperatingattheirnominalvalueof100V.Thesystem performanceisdepictedinthevariousgraphsthatfollow. Figure7.1:Three{phaseac{gridvoltageforcaseI. Fig.7.1showsthebalancedthree{phaseac{gridvoltageatafrequencyof60Hz. 37
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Figure7.2:Simulationresultshowingtheactivepowerreference P ref andthegrid activepower P grid forcaseI. FromFig.7.2wecanseethattheactivepowerloaddemandincreasesfrom5 kWto10kWattimeequalto2secondsanddecreasesto8kWat3seconds.Itcan beobservedthattheMMC+VCMsystemissuccessfullyabletomeetthepowerload demandastheactivepowerreferenceisbeingtrackedsuccessfully. Figure7.3:Simulationresultshowingthereactivepowerreference Q ref andthegrid reactivepower Q grid forcaseI. ThereactivepowerdemandiszeroandascanbeseenfromFig.7.3,themeasured reactivepowerisfollowingthereference. 38
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Figure7.4:CirculatingcurrentsofallthethreephasesforcaseI. Theperformanceofthecirculatingcurrentsuppressingcontrollercanbeseen fromFig.7.4asthethree{phasecirculatingcurrentsaresuppressed. Figure7.5:CapacitorvoltagesoftheVCMsinbetweenphasesaandbforcaseI. ThemainpurposeoftheVCMcontrolleristocompensateforthevoltagedierencebetweenthephases.So,whenthevoltagesinthephasesarebalanced,weshould expecttheVCMcapacitorvoltagestobezerowhichcanbeveriedfromFig.7.5. Fig.7.6showsthecapacitorvoltagesoftheSMsinthetoparmofphase{a.It canbeseenfromthegurethattheSMvoltagerippleiswithinthe5%rangeand thevoltagebalancingalgorithmisabletobalancethecapacitorvoltages. 39
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Figure7.6:CapacitorvoltagesoftheSMsinthetoparmofphase{aforcaseI. 40
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Figure7.7:CapacitorvoltagesoftheSMsforthersttest. 41
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7.2CaseII:unbalancedoperatingcondition Inthesecondcase,threeseparatetestswereconductedtoverifytheperformance oftheproposedsystem.Inallthetests,forthersthalfofthesimulation,the MMC+VCMsystemisoperatedwithnoVCMstoshowtheriseincirculatingcurrents.Forthesecondhalfofthesimulation,thesameSMvoltagepatternisgivento thesystemwiththeVCMsnowturnedon. 7.2.1Firsttest:disturbancesinphasea Inthersttest,onlyphaseaundergoesvoltageunbalance.Initially,alltheSMs areoperatingattheirnominalvalueof100V.Attimeequalto0.1seconds,the voltagesofSM1andSM2ofthetoparmandSM3ofthebottomarmofphaseaare increasedby50%ofitsnominalvalueasshowninFig.7.7.AlltheotherSMsare operatingat100V. Whentherstunbalanceconditionoccurs,theVCMsaredeactivated.Thereis novoltagecompensationatthispoint.Asaresultofthis,theVCMvoltagesare zero.Balancedconditionsremainfromtimeequalto0.4secondsto0.6seconds.For thesecondhalfofthesimulationfrom0.6seconds,thesameSMvoltagepatternis giventothesystem,withtheVCMsnowactivated.AsyoucanseefromFig.7.8,the VCMsarenowcompensatingforthevoltagedierencebetweenthephases.VCMsin betweenphasesbandchaveanegligiblechangebecauseonlyphaseaisundergoing voltageunbalance. FromFig.7.9wecanseethatduringthersthalfofthesimulation,thecirculatingcurrentsincreaseinmagnitudeastheVCMsaredeactivated.However,whenthe VCMsareactivatedforthesecondhalfofthesimulationwiththesameSMvoltage pattern,theyaidinsuppressingthecirculatingcurrentswhichcanbeveriedfrom 42
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Figure7.8:CapacitorvoltagesoftheVCMsforrsttest. Figure7.9:Circulatingcurrentsofallthethreephasesforrsttest. 43
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Figure7.10:CapacitorvoltagesoftheSMsforthesecondtest. 44
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Fig.7.9.Figs.7.8and7.9demonstratetheeectivenessofthecirculatingcurrent suppressingcontrollerandtheVCMcontroller. 7.2.2Secondtest:disturbancesinphasesaandb Inthesecondtest,phasesaandbbothundergovoltageunbalance.Initially,all theSMsareoperatingattheirnominalvalueof100V.Attimeequalto0.1seconds, thevoltageofSM1oftoparmofphaseaisincreasedby50%ofitsnominalvalue whilethevoltageofSM2ofthebottomarmofphaseaisdecreasedby25%ofits nominalvalue.Similarly,SM4ofthebottomarmofphasebisalsodecreasedby25% ofitsnominalvalueasshowninFig.7.10.AlltheotherSMsareoperatingat100V. Figure7.11:CapacitorvoltagesoftheVCMsforsecondtest. 45
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Figure7.12:Circulatingcurrentsofallthethreephasesforsecondtest. Similartothersttest,theVCMsareinitiallydeactivatedfortherstunbalance conditionandthereforetheirvoltagesarezeroascanbeveriedfromFig.7.11.The circulatingcurrentsalsobehaveinasimilarmannerasinthersttestwhichcanbe seeninFig.7.12. 7.2.3Thirdtest:disturbancesinphasesa,bandc Inthethirdtest,phasesa,bandcallundergovoltageunbalance.Initially,allthe SMsareoperatingattheirnominalvalueof100V.Attimeequalto0.1seconds,the voltageofSM1oftoparmofphaseaisincreasedby50%ofitsnominalvaluewhile thevoltagesofSM2ofthebottomarmofphasebandSM4ofthetoparmofphase carebothdecreasedby25%oftheirnominalvalueasshowninFig.7.13.Allthe otherSMsareoperatingat100V. Similartotherstandsecondtests,theVCMsareinitiallydeactivatedforthe rstunbalanceconditionandthereforetheirvoltagesarezeroascanbeveriedfrom Fig.7.14.Thecirculatingcurrentsalsobehaveinasimilarmannerasintherstand secondtestswhichcanbeseeninFig.7.15. 46
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Figure7.13:CapacitorvoltagesoftheSMsforthethirdtest. 47
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Figure7.14:CapacitorvoltagesoftheVCMsforthirdtest. Figure7.15:Circulatingcurrentsofallthethreephasesforthirdtest. 48
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Figure7.16:Three{phaseac{gridvoltageforcaseII. Theac{sidequantitiesforallthethreetestsarenotaectedbythechangeinthe SMvoltageandtheriseinmagnitudeofthecirculatingcurrentswhichcanbeveried fromFig.7.16.ThepowerloaddemandisthesameasincaseI.FromFigs.7.17and 7.18,wecanseethattheMMC+VCMsystemisabletosupplythenecessaryload demandevenundertheunbalancedcondition.Thisispossibleduetothedistributed arrangementofthevoltagesourcesinsidetheSMs. 49
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Figure7.17:Simulationresultshowingtheactivepowerreference P ref andthegrid activepower P grid forcaseII. Figure7.18:Simulationresultshowingthereactivepowerreference Q ref andthe gridreactivepower Q grid forcaseII. 50
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8.Conclusions Inthisthesisamodularmultilevelconverterwithvoltagecorrectionmodules wasproposedtomeettheloaddemandunderunbalancedconditionsaswellassuppressthecirculatingcurrents.Twocasestudieswereconsideredtotesttheproposed topology.Thecontrolmethodologyinvolvingvariouscontrollerswasexplained.The proposedsystemwasvalidatedviadetailedPSCAD/EMTDCcomputersimulations fortheloaddemand.Thecirculatingcurrentsweresuccessfullysuppressedwiththe helpofthecirculatingcurrentsuppressingcontrollerandtheVCMswereableto compensateforthevoltagedierenceunderunbalancedconditions.Simulationresultsdemonstratedtheeectivenessoftheproposedcontrollersinmeetingtheload demandunderunbalancedconditions. 51
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9.Contributions Thecontributionsofthisthesisisasfollows: AnMMCwithlessnumberofVCMsisproposedtosuppressthecirculating currents. ThepowerdemandismetbecauseofthedistributedarrangementoftheSMs whichmakestheMMCmorereliable. ThePD{PWMtechniqueisimplementedtoinjectthepowerintothethree{ phaseac{gridwhichalsoallowedforasizereductionoftheLC{lter. ThecontrolschemesandmodelswerevalidatedviadetailedPSCAD/EMTDC computersimulationswhichalsodemonstratedtheeectivenessoftheproposed controllersinmeetingtheloaddemand. 52
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10.Futurework Theproposedmethodologyopensthedoorsforpossiblefutureworks.Forinstance,asystematicapproachindesigningandsizingoftheVCMcomponentsinvolvingthecurrentratingoftheswitchesandsizingtheVCMcapacitanceasthe variationintheVCMcapacitorvoltagedependsonthiscapacitance.Thereliability oftheMMCcanalsobeimprovedbyaddingredundantVCMs.Inthecaseofa faultyVCM,thisredundantVCMcancontinuetooperatewithoutanyinterruption untilthefaultyVCMisreplacedinthenextscheduledmaintenance.Ahardware prototypecanalsobeimplementedasapossiblefuturework. 53
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